On 5/16/26 19:15, Philippe Mathieu-Daudé wrote:
aspeed_ast27x0.c models 2 similar SoC based on a 64-bit only
CPU (Cortex-A35), only available in the 64-bit binary.
If we build this file as common object, these SoCs become
available in both 32 and 64-bit binaries; however when running
the introspection test on the 32-bit binary, the init() method
tries to init the Cortex-A35 type -- although not realizing it
-- which is not available. Simply skip CPU initialization when
running QTests on a 32-bit binary, asserting the realization
step is not reached.
Suggested-by: Cédric Le Goater <[email protected]>
Signed-off-by: Philippe Mathieu-Daudé <[email protected]>
Reviewed-by: Cédric Le Goater <[email protected]>
Thanks,
C.
---
hw/arm/aspeed_ast27x0.c | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c
index 87dcb82e1b0..8311902f0c7 100644
--- a/hw/arm/aspeed_ast27x0.c
+++ b/hw/arm/aspeed_ast27x0.c
@@ -18,6 +18,7 @@
#include "qemu/error-report.h"
#include "hw/i2c/aspeed_i2c.h"
#include "net/net.h"
+#include "system/qtest.h"
#include "system/system.h"
#include "hw/intc/arm_gicv3.h"
#include "qobject/qlist.h"
@@ -419,6 +420,15 @@ static void aspeed_soc_ast2700_init(Object *obj)
}
for (i = 0; i < sc->num_cpus; i++) {
+ if (qtest_enabled() && !target_aarch64()) {
+ /*
+ * Introspection qtest just want to create this object
+ * without realizing it. ARM_CPU_TYPE_NAME("cortex-a35")
+ * is not available on 32-bit binary: skip it since we
+ * won't even realize it.
+ */
+ continue;
+ }
object_initialize_child(obj, "cpu[*]", &a->cpu[i],
aspeed_soc_cpu_type(sc->valid_cpu_types));
}
@@ -693,6 +703,10 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev,
Error **errp)
qemu_irq irq;
int uart;
+ if (qtest_enabled() && !target_aarch64()) {
+ g_assert_not_reached();
+ }
+
/* Default boot region (SPI memory or ROMs) */
memory_region_init(&s->spi_boot_container, OBJECT(s),
"aspeed.spi_boot_container", 0x400000000);
