On 5/13/26 07:37, Cédric Le Goater wrote:
Commit e09cf36321f6 ("hw: aspeed_scu: Add AST2600 support") introduced
a typo on the definitions of the Random Number Generator registers.
Fix that.
The implementation of RNG_CTRL and RNG_DATA should be rechecked on HW
since the QEMU implementation always generates random data, regardless
of RNG_CTRL. A comment in aspeed_ast2600_scu_read() admits uncertainty
about the behavior :
/*
* On hardware, RNG_DATA works regardless of the state of the
* enable bit in RNG_CTRL
*
* TODO: Check this is true for ast2600
*/
Resolves: https://gitlab.com/qemu-project/qemu/-/work_items/2350
Fixes: e09cf36321f6 ("hw: aspeed_scu: Add AST2600 support")
Signed-off-by: Cédric Le Goater <[email protected]>
---
hw/misc/aspeed_scu.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c
index e4160356e443..9d9f43e6b563 100644
--- a/hw/misc/aspeed_scu.c
+++ b/hw/misc/aspeed_scu.c
@@ -128,8 +128,8 @@
#define AST2600_HW_STRAP2 TO_REG(0x510)
#define AST2600_HW_STRAP2_CLR TO_REG(0x514)
#define AST2600_HW_STRAP2_PROT TO_REG(0x518)
-#define AST2600_RNG_CTRL TO_REG(0x524)
-#define AST2600_RNG_DATA TO_REG(0x540)
+#define AST2600_RNG_CTRL TO_REG(0x520)
+#define AST2600_RNG_DATA TO_REG(0x524)
#define AST2600_CHIP_ID0 TO_REG(0x5B0)
#define AST2600_CHIP_ID1 TO_REG(0x5B4)
Applied to
https://github.com/legoater/qemu aspeed-next
Thanks,
C.
