Jamin,
On 4/17/26 05:28, Jamin Lin wrote:
This series improves AST2700 platform support by aligning SSP/TSP
power and reset behavior with hardware, and enabling DRAM remapping
required for proper firmware boot flow.
v1:
1. The changes move DRAM/SDMC initialization earlier to support memory
aliasing, add DRAM aliases for SSP/TSP SDRAM remap, and implement
SSP/TSP reset, power-on, and remap controls via SCU registers.
2. With these updates, SSP and TSP can be booted via PSP and load their
binaries from DRAM. Functional tests and documentation are updated
accordingly.
v2:
Fix "make check" failure caused by both AST2700 and AST1700 realizing the
same
TYPE_AST2700_SCU model.
v3:
1. Drop "Move DRAM and SDMC initialization earlier to support memory aliasing"
2. Support SPI/FMC FIFO Mode
3. Add unimplemented devices
v4:
1. Introduce Aspeed2700SCU subclass and separate from generic SCU.
2. Add separate reset handler for AST2700 SCUIO
3. Add AST2700 SCUIO RNG control and data registers
4. Share single SCUIO instance across PSP, SSP, and TSP
5. Fix AST2700 FC hardware strap settings
Just a quick note to tell you that I didn't forget this series.
This is on my TODO list for QEMU 11.1. It's spring time and
changes are blooming all around.
Thanks,
C.
Jamin Lin (21):
hw/misc/aspeed_scu: Introduce Aspeed2700SCU subclass and separate from
generic SCU
hw/misc/aspeed_scu: Add separate reset handler for AST2700 SCUIO
hw/arm/ast27x0: Start SSP in powered-off state to match hardware
behavior
hw/arm/ast27x0: Start TSP in powered-off state to match hardware
behavior
hw/arm/ast27x0: Add DRAM alias for SSP SDRAM remap
hw/arm/ast27x0: Add DRAM alias for TSP SDRAM remap
hw/misc/aspeed_scu: Implement SSP reset and power-on control via SCU
registers
hw/misc/aspeed_scu: Implement TSP reset and power-on control via SCU
registers
hw/misc/aspeed_scu: Add SCU support for SSP SDRAM remap
hw/misc/aspeed_scu: Add SCU support for TSP SDRAM remap
hw/arm/ast27x0: Share FMC controller with SSP and TSP
hw/arm/aspeed_ast27x0: Add unimplemented Privilege Controller MMIO
regions for SSP/TSP
hw/arm/aspeed_ast27x0: Add unimplemented OTP controller MMIO regions
for SSP/TSP
hw/block/m25p80: Implement volatile status register write enable for
Winbond
hw/ssi/aspeed_smc: Add Data FIFO-based flash access support for
AST2700
hw/misc/aspeed_scu: Drop noisy unhandled read logs for AST2700
SCU/SCUIO
hw/misc/aspeed_scu: Add AST2700 SCUIO RNG control and data registers
hw/arm/ast27x0: Share single SCUIO instance across PSP, SSP, and TSP
hw/arm/aspeed_ast27x0-fc: Fix hardware strap settings
tests/functional/aarch64/test_aspeed_ast2700fc: Boot SSP/TSP via PSP
and load binaries from DRAM
docs: Add support vbootrom and update Manual boot for ast2700fc
docs/system/arm/aspeed.rst | 42 ++-
include/hw/arm/aspeed_ast1700.h | 2 +-
include/hw/arm/aspeed_coprocessor.h | 13 +-
include/hw/arm/aspeed_soc.h | 4 +
include/hw/misc/aspeed_scu.h | 10 +
include/hw/ssi/aspeed_smc.h | 3 +-
hw/arm/aspeed_ast27x0-fc.c | 22 +-
hw/arm/aspeed_ast27x0-ssp.c | 67 +++-
hw/arm/aspeed_ast27x0-tsp.c | 64 +++-
hw/arm/aspeed_ast27x0.c | 22 +-
hw/arm/aspeed_coprocessor_common.c | 2 -
hw/block/m25p80.c | 36 +-
hw/misc/aspeed_scu.c | 324 +++++++++++++++++-
hw/ssi/aspeed_smc.c | 113 +++++-
.../aarch64/test_aspeed_ast2700fc.py | 29 +-
15 files changed, 672 insertions(+), 81 deletions(-)
