Peter Maydell <[email protected]> writes: > On Thu, 21 May 2026 at 15:55, Alex Bennée <[email protected]> wrote: >> >> Peter Maydell <[email protected]> writes: >> >> > The SVE FCVTLT_hs operation produces a halfprec result, so we should >> > use the FPST_A64_F16 fpstatus for it. >> >> Maybe I'm reading the Arm ARM wrong (I can't find FCVTLT_hs but I can >> see FCVTLT in the SVE encodings). But these are all widening operations >> so I can see halfprec to single, not the other way around. > > Yes, I got the commit message wrong here; this is half to single, > and we need to use the A64_F16 fpstatus for conversions from > halfprec, not conversions to it. The e07b48995aaa commit message > does a better job of explaining this than I did this time around. > > The _hs is how the QEMU decode file splits the half to single > and the single to double encodings, which are the same insn > mnememonic in the architecture. > > Improved commit message: > > ===begin=== > We should be using the F16-specific float_status for conversions from > half-precision, because halfprec inputs never set Input Denormal. > If we use the FPST_A64 fpstatus then we will incorrectly set > FPCR.IDC for input-denormals when FPCR.AH=1. > > In commit e07b48995aaa we updated most of the halfprec-to-other > conversion insns to use FPST_A64_F16 as part of implementing FEAT_AHP. > However we missed the SVE FCVTLT instruction, which has a > halfprec-to-single encoding. > > Correct the FPST we use for the hs variant of FCVTLT. > > [cc, fixes, &c] > ===endit=== >
Reviewed-by: Alex Bennée <[email protected]> > > thanks > -- PMM -- Alex Bennée Virtualisation Tech Lead @ Linaro
