Re: [PATCH 2/5] target/arm: Setup new registers for GPC3

[Richard Henderson]

On 5/28/26 08:34, Jim MacArthur wrote:

+static void gpcbw_write(CPUARMState *env, const ARMCPRegInfo *ri,
+                        uint64_t value)
+{
+    uint64_t rw_mask = R_GPCBW_BWADDR_MASK | R_GPCBW_BWSTRIDE_MASK |
+                       R_GPCBW_BWSIZE_MASK;
+    ARMCPU *cpu = env_archcpu(env);
+    tlb_flush_by_mmuidx(CPU(cpu), alle1_tlbmask(env));

The GPT affects all EL, so this must flush all tlb, not just EL1.


r~