On 4/17/26 05:28, Jamin Lin wrote:
The AST2700 SSP/TSP firmware accesses Privilege Controller MMIO regions that
are not yet implemented in QEMU.

This change adds unimplemented MMIO devices for the Privilege Controller
blocks and maps them to their corresponding physical addresses in the SSP/TSP
address space. These stub devices allow QEMU to safely handle firmware
accesses and prevent spurious exceptions, while accurately reflecting
the hardware memory map.

No functional changes.

Signed-off-by: Jamin Lin <[email protected]>
---
  include/hw/arm/aspeed_coprocessor.h |  1 +
  include/hw/arm/aspeed_soc.h         |  2 ++
  hw/arm/aspeed_ast27x0-ssp.c         | 12 ++++++++++++
  hw/arm/aspeed_ast27x0-tsp.c         | 12 ++++++++++++
  4 files changed, 27 insertions(+)

please send first.

Thanks,

C.


diff --git a/include/hw/arm/aspeed_coprocessor.h 
b/include/hw/arm/aspeed_coprocessor.h
index 2460a11401..084040bbed 100644
--- a/include/hw/arm/aspeed_coprocessor.h
+++ b/include/hw/arm/aspeed_coprocessor.h
@@ -46,6 +46,7 @@ struct Aspeed27x0CoprocessorState {
      AspeedINTCState intc[2];
      UnimplementedDeviceState ipc[2];
      UnimplementedDeviceState scuio;
+    UnimplementedDeviceState pric[2];
ARMv7MState armv7m; diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
index adf2f2898a..d39e4f7553 100644
--- a/include/hw/arm/aspeed_soc.h
+++ b/include/hw/arm/aspeed_soc.h
@@ -297,6 +297,8 @@ enum {
      ASPEED_DEV_IOEXP1_INTCIO,
      ASPEED_DEV_IOEXP0_I3C,
      ASPEED_DEV_IOEXP1_I3C,
+    ASPEED_DEV_PRIC0,
+    ASPEED_DEV_PRIC1,
  };
const char *aspeed_soc_cpu_type(const char * const *valid_cpu_types);
diff --git a/hw/arm/aspeed_ast27x0-ssp.c b/hw/arm/aspeed_ast27x0-ssp.c
index bfd6fe4485..467fdea9db 100644
--- a/hw/arm/aspeed_ast27x0-ssp.c
+++ b/hw/arm/aspeed_ast27x0-ssp.c
@@ -22,11 +22,13 @@ static const hwaddr aspeed_soc_ast27x0ssp_memmap[] = {
      [ASPEED_DEV_SDRAM]     =  0x00000000,
      [ASPEED_DEV_SRAM]      =  0x70000000,
      [ASPEED_DEV_INTC]      =  0x72100000,
+    [ASPEED_DEV_PRIC0]     =  0x72140000,
      [ASPEED_DEV_SCU]       =  0x72C02000,
      [ASPEED_DEV_TIMER1]    =  0x72C10000,
      [ASPEED_DEV_UART4]     =  0x72C1A000,
      [ASPEED_DEV_IPC0]      =  0x72C1C000,
      [ASPEED_DEV_FMC]       =  0x74000000,
+    [ASPEED_DEV_PRIC1]     =  0x74100000,
      [ASPEED_DEV_SCUIO]     =  0x74C02000,
      [ASPEED_DEV_INTCIO]    =  0x74C18000,
      [ASPEED_DEV_UART0]     =  0x74C33000,
@@ -142,6 +144,10 @@ static void aspeed_soc_ast27x0ssp_init(Object *obj)
                              TYPE_UNIMPLEMENTED_DEVICE);
      object_initialize_child(obj, "scuio", &a->scuio,
                              TYPE_UNIMPLEMENTED_DEVICE);
+    object_initialize_child(obj, "pric0", &a->pric[0],
+                            TYPE_UNIMPLEMENTED_DEVICE);
+    object_initialize_child(obj, "pric1", &a->pric[1],
+                            TYPE_UNIMPLEMENTED_DEVICE);
  }
static void aspeed_soc_ast27x0ssp_realize(DeviceState *dev_soc, Error **errp)
@@ -276,6 +282,12 @@ static void aspeed_soc_ast27x0ssp_realize(DeviceState 
*dev_soc, Error **errp)
      aspeed_mmio_map_unimplemented(s->memory, SYS_BUS_DEVICE(&a->scuio),
                                    "aspeed.scuio",
                                    sc->memmap[ASPEED_DEV_SCUIO], 0x1000);
+    aspeed_mmio_map_unimplemented(s->memory, SYS_BUS_DEVICE(&a->pric[0]),
+                                  "aspeed.pric0",
+                                  sc->memmap[ASPEED_DEV_PRIC0], 0x1000);
+    aspeed_mmio_map_unimplemented(s->memory, SYS_BUS_DEVICE(&a->pric[1]),
+                                  "aspeed.pric1",
+                                  sc->memmap[ASPEED_DEV_PRIC1], 0x1000);
  }
static const Property aspeed_27x0_coprocessor_properties[] = {
diff --git a/hw/arm/aspeed_ast27x0-tsp.c b/hw/arm/aspeed_ast27x0-tsp.c
index 166dcb14ed..3a90bbec51 100644
--- a/hw/arm/aspeed_ast27x0-tsp.c
+++ b/hw/arm/aspeed_ast27x0-tsp.c
@@ -22,11 +22,13 @@ static const hwaddr aspeed_soc_ast27x0tsp_memmap[] = {
      [ASPEED_DEV_SDRAM]     =  0x00000000,
      [ASPEED_DEV_SRAM]      =  0x70000000,
      [ASPEED_DEV_INTC]      =  0x72100000,
+    [ASPEED_DEV_PRIC0]     =  0x72140000,
      [ASPEED_DEV_SCU]       =  0x72C02000,
      [ASPEED_DEV_TIMER1]    =  0x72C10000,
      [ASPEED_DEV_UART4]     =  0x72C1A000,
      [ASPEED_DEV_IPC0]      =  0x72C1C000,
      [ASPEED_DEV_FMC]       =  0x74000000,
+    [ASPEED_DEV_PRIC1]     =  0x74100000,
      [ASPEED_DEV_SCUIO]     =  0x74C02000,
      [ASPEED_DEV_INTCIO]    =  0x74C18000,
      [ASPEED_DEV_UART0]     =  0x74C33000,
@@ -142,6 +144,10 @@ static void aspeed_soc_ast27x0tsp_init(Object *obj)
                              TYPE_UNIMPLEMENTED_DEVICE);
      object_initialize_child(obj, "scuio", &a->scuio,
                              TYPE_UNIMPLEMENTED_DEVICE);
+    object_initialize_child(obj, "pric0", &a->pric[0],
+                            TYPE_UNIMPLEMENTED_DEVICE);
+    object_initialize_child(obj, "pric1", &a->pric[1],
+                            TYPE_UNIMPLEMENTED_DEVICE);
  }
static void aspeed_soc_ast27x0tsp_realize(DeviceState *dev_soc, Error **errp)
@@ -273,6 +279,12 @@ static void aspeed_soc_ast27x0tsp_realize(DeviceState 
*dev_soc, Error **errp)
      aspeed_mmio_map_unimplemented(s->memory, SYS_BUS_DEVICE(&a->scuio),
                                    "aspeed.scuio",
                                    sc->memmap[ASPEED_DEV_SCUIO], 0x1000);
+    aspeed_mmio_map_unimplemented(s->memory, SYS_BUS_DEVICE(&a->pric[0]),
+                                  "aspeed.pric0",
+                                  sc->memmap[ASPEED_DEV_PRIC0], 0x1000);
+    aspeed_mmio_map_unimplemented(s->memory, SYS_BUS_DEVICE(&a->pric[1]),
+                                  "aspeed.pric1",
+                                  sc->memmap[ASPEED_DEV_PRIC1], 0x1000);
  }
static const Property aspeed_27x0_coprocessor_properties[] = {


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