On Fri, May 29, 2026 at 3:37 PM Anton Blanchard <[email protected]> wrote:
>
> The privilege level and ELP are implicit state (like virt), so print them
> out.
>
> Signed-off-by: Anton Blanchard <[email protected]>

Reviewed-by: Alistair Francis <[email protected]>

Alistair

> ---
>  target/riscv/cpu.c | 22 ++++++++++++++++++++++
>  1 file changed, 22 insertions(+)
>
> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
> index 952e34fdf5..b38ddc39ea 100644
> --- a/target/riscv/cpu.c
> +++ b/target/riscv/cpu.c
> @@ -580,6 +580,22 @@ static void riscv_dump_csr(CPURISCVState *env, int 
> csrno, FILE *f)
>      }
>  }
>
> +#if !defined(CONFIG_USER_ONLY)
> +static const char *riscv_priv_str(uint32_t priv)
> +{
> +    switch (priv) {
> +    case PRV_M:
> +        return "M";
> +    case PRV_S:
> +        return "S";
> +    case PRV_U:
> +        return "U";
> +    }
> +
> +    return "?";
> +}
> +#endif
> +
>  static void riscv_cpu_dump_state(CPUState *cs, FILE *f, int flags)
>  {
>      RISCVCPU *cpu = RISCV_CPU(cs);
> @@ -588,9 +604,15 @@ static void riscv_cpu_dump_state(CPUState *cs, FILE *f, 
> int flags)
>      uint8_t *p;
>
>  #if !defined(CONFIG_USER_ONLY)
> +    qemu_fprintf(f, " %s %s\n", "priv   =  ", riscv_priv_str(env->priv));
> +
>      if (riscv_has_ext(env, RVH)) {
>          qemu_fprintf(f, " %s %d\n", "V      =  ", env->virt_enabled);
>      }
> +
> +    if (cpu->cfg.ext_zicfilp) {
> +        qemu_fprintf(f, " %s %d\n", "elp    =  ", env->elp);
> +    }
>  #endif
>      qemu_fprintf(f, " %s %" PRIx64 "\n", "pc      ", env->pc);
>  #ifndef CONFIG_USER_ONLY
> --
> 2.34.1
>
>

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