Adds the GPC bypass windows defined in D9.2 of the Arm ARM. D9.8 (the APAS instruction) is not implemented yet.
A large part of this is testing. To test GPC effectively, we need to check that memory accesses are causing exceptions, or not causing exceptions as appropriate. For some tests, boot.S is altered to record certain exceptions and continue executing the test. An alternative would be to use gdbstub to break on locations inside the vector table and continue, but this requires significant coordination between the C test binary and Python test driver, so has been avoided for now. Signed-off-by: Jim MacArthur <[email protected]> --- Changes in v2: - ptw.c changes have been rewritten after a number of faults were found - boot.S: Align exception_log to page - target/arm/helper.c: flush all caches and remove redundant mask - Switch on of GPC3 moved after feature implementation - Link to v1: https://lore.kernel.org/qemu-devel/[email protected] --- Jim MacArthur (6): target/arm/tcg/cpu64.c: Extra test for GPC3. target/arm: Setup new registers for GPC3 target/arm/ptw.c: Add Granule Bypass Windows target/arm/cpu-features.h: x-rme now means GPC3 tests/tcg/aarch64/system: Alternative boot object for exception logging tests/tcg/aarch64/system/gpc-test.c: Basic test for granule protection check target/arm/cpu-features.h | 5 + target/arm/cpu.h | 7 ++ target/arm/helper.c | 19 ++++ target/arm/ptw.c | 81 +++++++++++++++ target/arm/tcg/cpu64.c | 4 +- tests/tcg/aarch64/Makefile.softmmu-target | 22 +++- tests/tcg/aarch64/system/boot.S | 62 +++++++++++ tests/tcg/aarch64/system/boot.h | 14 +++ tests/tcg/aarch64/system/gpc-test.c | 165 ++++++++++++++++++++++++++++++ 9 files changed, 372 insertions(+), 7 deletions(-) --- base-commit: 405c32d2b18a683ba36301351af75125d9afda08 change-id: 20260528-jmac-gpc3b-187f9d7cf0dd Best regards, -- Jim MacArthur <[email protected]>
