On Thu, Jun 11, 2026 at 7:44 AM Daniel Henrique Barboza <[email protected]> wrote: > > Add two tests for the recently added riscv-server-ref machine: > > - a new test_opensbi.py test. The idea is to have a quick test that can > catch trivial regressions that would prevent OpenSBI to finish; > - a new Linux boot "thorough" test that will boot the machine up to the > buildroot prompt. > > Signed-off-by: Daniel Henrique Barboza <[email protected]>
Reviewed-by: Alistair Francis <[email protected]> Alistair > --- > tests/functional/riscv64/meson.build | 2 + > tests/functional/riscv64/test_opensbi.py | 4 ++ > tests/functional/riscv64/test_server_ref.py | 59 +++++++++++++++++++++ > 3 files changed, 65 insertions(+) > create mode 100755 tests/functional/riscv64/test_server_ref.py > > diff --git a/tests/functional/riscv64/meson.build > b/tests/functional/riscv64/meson.build > index 5871211e89..2eb12586bf 100644 > --- a/tests/functional/riscv64/meson.build > +++ b/tests/functional/riscv64/meson.build > @@ -2,6 +2,7 @@ > > test_riscv64_timeouts = { > 'boston' : 120, > + 'server_ref' : 120, > 'tuxrun' : 120, > } > > @@ -13,6 +14,7 @@ tests_riscv64_system_quick = [ > tests_riscv64_system_thorough = [ > 'endianness', > 'boston', > + 'server_ref', > 'sifive_u', > 'tuxrun', > ] > diff --git a/tests/functional/riscv64/test_opensbi.py > b/tests/functional/riscv64/test_opensbi.py > index d077e40f42..057f55f90b 100755 > --- a/tests/functional/riscv64/test_opensbi.py > +++ b/tests/functional/riscv64/test_opensbi.py > @@ -32,5 +32,9 @@ def test_riscv_virt(self): > self.set_machine('virt') > self.boot_opensbi() > > + def test_riscv_server_ref(self): > + self.set_machine('riscv-server-ref') > + self.boot_opensbi() > + > if __name__ == '__main__': > QemuSystemTest.main() > diff --git a/tests/functional/riscv64/test_server_ref.py > b/tests/functional/riscv64/test_server_ref.py > new file mode 100755 > index 0000000000..2ecfcf60ad > --- /dev/null > +++ b/tests/functional/riscv64/test_server_ref.py > @@ -0,0 +1,59 @@ > +#!/usr/bin/env python3 > +# > +# Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries. > +# > +# SPDX-License-Identifier: GPL-2.0-or-later > +# > +""" > +riscv-server-ref board test > +""" > + > +from qemu_test import QemuSystemTest, Asset > +from qemu_test import wait_for_console_pattern > + > +class RiscvServerRefTest(QemuSystemTest): > + """ > + Test the riscv-server-ref board > + """ > + > + ASSET_KERNEL = Asset( > + ('https://github.com/danielhb/qemu-machine-boot/raw/refs/heads/' > + 'master/riscv/images/virt64/buildroot/Image'), > + '6bacc876c769c1bb6057d2bf549eba67fbe83916e8223f9fe21c8e8fff665a36') > + > + ASSET_ROOTFS = Asset( > + ('https://github.com/danielhb/qemu-machine-boot/raw/refs/heads/' > + 'master/riscv/images/virt64/buildroot/rootfs.ext2'), > + 'f00bb88749f945d80675540a1338bd1ccb226574685a5b6c65ab44027d0411a8') > + > + def test_boot_linux_test(self): > + self.set_machine('riscv-server-ref') > + kernel_path = self.ASSET_KERNEL.fetch() > + rootfs_path = self.ASSET_ROOTFS.fetch() > + > + self.vm.add_args('-kernel', kernel_path) > + self.vm.add_args('-append', 'rw rootwait root=/dev/sda') > + self.vm.add_args('-drive', > + f'file={rootfs_path},format=raw,id=hd0,snapshot=on,if=none') > + self.vm.add_args('-device', 'ahci,id=ahci') > + self.vm.add_args('-device', 'ide-hd,drive=hd0,bus=ahci.0') > + > + self.vm.set_console() > + self.vm.launch() > + > + # Wait for OpenSBI > + wait_for_console_pattern(self, 'OpenSBI') > + > + # Wait for Linux kernel boot > + wait_for_console_pattern(self, 'Linux version') > + wait_for_console_pattern(self, 'Machine model: > qemu,riscv-server-ref') > + > + # Test e1000e network card functionality > + wait_for_console_pattern(self, 'e1000e') > + wait_for_console_pattern(self, 'Network Connection') > + > + # Wait for boot to complete - system reaches login prompt > + wait_for_console_pattern(self, 'Run /sbin/init as init process') > + > +if __name__ == '__main__': > + QemuSystemTest.main() > -- > 2.43.0 > >
