On Tue, Jun 16, 2026 at 6:40 AM Daniel Henrique Barboza <[email protected]> wrote: > > We want to consolidate the CPU socket FDT creation into a single helper. > 'virt' and spike has the same code but sifive_u does not have cpu-map, > cluster and core subnodes. > > These subnodes are present in other boards even in single socket configs > without NUMA. This is a strong indicator that their presence doesn't > hurt a NUMA-less board like sifive_u. > > Add these DTs to make the FDT standardization straightforward. > > Signed-off-by: Daniel Henrique Barboza <[email protected]>
Reviewed-by: Alistair Francis <[email protected]> Alistair > --- > hw/riscv/sifive_u.c | 12 ++++++++++++ > 1 file changed, 12 insertions(+) > > diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c > index 9a791b36d6..a4265fed0f 100644 > --- a/hw/riscv/sifive_u.c > +++ b/hw/riscv/sifive_u.c > @@ -109,6 +109,7 @@ static void create_fdt(SiFiveUState *s, const MemMapEntry > *memmap, > "sifive,plic-1.0.0", "riscv,plic0" > }; > g_autofree uint32_t *intc_phandles = g_new0(uint32_t, ms->smp.cpus); > + g_autofree char *clust_name = NULL; > > fdt = ms->fdt = create_board_device_tree("SiFive HiFive Unleashed A00", > "sifive,hifive-unleashed-a00", &s->fdt_size); > @@ -143,11 +144,17 @@ static void create_fdt(SiFiveUState *s, const > MemMapEntry *memmap, > CLINT_TIMEBASE_FREQ); > qemu_fdt_setprop_cell(fdt, "/cpus", "#size-cells", 0x0); > qemu_fdt_setprop_cell(fdt, "/cpus", "#address-cells", 0x1); > + qemu_fdt_add_subnode(fdt, "/cpus/cpu-map"); > + > + clust_name = g_strdup_printf("/cpus/cpu-map/cluster%d", 0); > + qemu_fdt_add_subnode(fdt, clust_name); > > for (cpu = ms->smp.cpus - 1; cpu >= 0; cpu--) { > int cpu_phandle = phandle++; > nodename = g_strdup_printf("/cpus/cpu@%d", cpu); > char *intc = g_strdup_printf("/cpus/cpu@%d/interrupt-controller", > cpu); > + g_autofree char *core_name = NULL; > + > qemu_fdt_add_subnode(fdt, nodename); > /* cpu 0 is the management hart that does not have mmu */ > if (cpu != 0) { > @@ -173,6 +180,11 @@ static void create_fdt(SiFiveUState *s, const > MemMapEntry *memmap, > qemu_fdt_setprop_string(fdt, intc, "compatible", "riscv,cpu-intc"); > qemu_fdt_setprop(fdt, intc, "interrupt-controller", NULL, 0); > qemu_fdt_setprop_cell(fdt, intc, "#interrupt-cells", 1); > + > + core_name = g_strdup_printf("%s/core%d", clust_name, cpu); > + qemu_fdt_add_subnode(fdt, core_name); > + qemu_fdt_setprop_cell(fdt, core_name, "cpu", cpu_phandle); > + > g_free(intc); > g_free(nodename); > } > -- > 2.43.0 > >
