On Tue, Jun 16, 2026 at 6:39 AM Daniel Henrique Barboza <[email protected]> wrote: > > This sifive_u only helper shares DT code with other boards. The idea is > to reduce code repetition while keeping sifive_u characteristics in > place. > > Signed-off-by: Daniel Henrique Barboza <[email protected]>
Reviewed-by: Alistair Francis <[email protected]> Alistair > --- > hw/riscv/fdt-common.c | 11 +++++++++++ > hw/riscv/sifive_u.c | 24 +++--------------------- > include/hw/riscv/fdt-common.h | 4 ++++ > 3 files changed, 18 insertions(+), 21 deletions(-) > > diff --git a/hw/riscv/fdt-common.c b/hw/riscv/fdt-common.c > index 70168ad657..b27ff13bca 100644 > --- a/hw/riscv/fdt-common.c > +++ b/hw/riscv/fdt-common.c > @@ -189,3 +189,14 @@ void create_fdt_socket_cpus(void *fdt, RISCVCPU > *socket_harts, > is_32_bit); > } > } > + > +void > +create_fdt_socket_cpu_sifive(void *fdt, char *clust_name, > + int cpu_id, int socket_id, > + int socket_hartid_base, uint32_t *phandle, > + uint32_t *intc_phandles) > +{ > + create_fdt_socket_cpu_internal(fdt, clust_name, NULL, cpu_id, > + socket_id, socket_hartid_base, > + phandle, intc_phandles, false, false); > +} > diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c > index 27c1a74d99..0c6e4204cb 100644 > --- a/hw/riscv/sifive_u.c > +++ b/hw/riscv/sifive_u.c > @@ -145,12 +145,9 @@ static void create_fdt(SiFiveUState *s, const > MemMapEntry *memmap, > qemu_fdt_add_subnode(fdt, clust_name); > > for (cpu = ms->smp.cpus - 1; cpu >= 0; cpu--) { > - int cpu_phandle = phandle++; > nodename = g_strdup_printf("/cpus/cpu@%d", cpu); > - char *intc = g_strdup_printf("/cpus/cpu@%d/interrupt-controller", > cpu); > - g_autofree char *core_name = NULL; > - > qemu_fdt_add_subnode(fdt, nodename); > + > /* cpu 0 is the management hart that does not have mmu */ > if (cpu != 0) { > if (is_32_bit) { > @@ -162,25 +159,10 @@ static void create_fdt(SiFiveUState *s, const > MemMapEntry *memmap, > } else { > riscv_isa_write_fdt(&s->soc.e_cpus.harts[0], fdt, nodename); > } > - qemu_fdt_setprop_string(fdt, nodename, "compatible", "riscv"); > - qemu_fdt_setprop_string(fdt, nodename, "status", "okay"); > - qemu_fdt_setprop_cell(fdt, nodename, "reg", cpu); > - qemu_fdt_setprop_string(fdt, nodename, "device_type", "cpu"); > - qemu_fdt_setprop_cell(fdt, nodename, "phandle", cpu_phandle); > - > - intc_phandles[cpu] = phandle++; > - > - qemu_fdt_add_subnode(fdt, intc); > - qemu_fdt_setprop_cell(fdt, intc, "phandle", intc_phandles[cpu]); > - qemu_fdt_setprop_string(fdt, intc, "compatible", "riscv,cpu-intc"); > - qemu_fdt_setprop(fdt, intc, "interrupt-controller", NULL, 0); > - qemu_fdt_setprop_cell(fdt, intc, "#interrupt-cells", 1); > > - core_name = g_strdup_printf("%s/core%d", clust_name, cpu); > - qemu_fdt_add_subnode(fdt, core_name); > - qemu_fdt_setprop_cell(fdt, core_name, "cpu", cpu_phandle); > + create_fdt_socket_cpu_sifive(fdt, clust_name, cpu, 0, 0, > + &phandle, intc_phandles); > > - g_free(intc); > g_free(nodename); > } > > diff --git a/include/hw/riscv/fdt-common.h b/include/hw/riscv/fdt-common.h > index 3af9d5c3fd..2d6b9a5d03 100644 > --- a/include/hw/riscv/fdt-common.h > +++ b/include/hw/riscv/fdt-common.h > @@ -26,4 +26,8 @@ void create_fdt_socket_cpus(void *fdt, RISCVCPU > *socket_harts, > int socket_hartid_base, uint32_t *phandle, > uint32_t *intc_phandles, bool numa_enabled, > bool is_32_bit); > +void create_fdt_socket_cpu_sifive(void *fdt, char *clust_name, > + int cpu_id, int socket_id, > + int socket_hartid_base, uint32_t *phandle, > + uint32_t *intc_phandles); > #endif > -- > 2.43.0 > >
