On 6/17/26 12:26, Emmanuel Blot wrote:
Wire up the two ADC128D818 instances that appear in the Anacapa DTS:
one on i2c8 mux channel 0 and one on i2c13 mux channel 3.

Signed-off-by: Emmanuel Blot <[email protected]>
---
  hw/arm/Kconfig                  |  1 +
  hw/arm/aspeed_ast2600_anacapa.c | 16 +++++++++++++---
  2 files changed, 14 insertions(+), 3 deletions(-)

diff --git a/hw/arm/Kconfig b/hw/arm/Kconfig
index fb798ccbee..04ecf5d473 100644
--- a/hw/arm/Kconfig
+++ b/hw/arm/Kconfig
@@ -553,6 +553,7 @@ config ASPEED_SOC
      select LED
      select PMBUS
      select MAX31785
+    select ADC128D818
      select FSI_APB2OPB_ASPEED
      select AT24C
      select PCI_EXPRESS
diff --git a/hw/arm/aspeed_ast2600_anacapa.c b/hw/arm/aspeed_ast2600_anacapa.c
index a1c8111a93..8f94a830e5 100644
--- a/hw/arm/aspeed_ast2600_anacapa.c
+++ b/hw/arm/aspeed_ast2600_anacapa.c
@@ -8,6 +8,7 @@
#include "qemu/osdep.h"
  #include "qapi/error.h"
+#include "hw/sensor/adc128d818.h"
  #include "hw/arm/machines-qom.h"
  #include "hw/arm/aspeed.h"
  #include "hw/arm/aspeed_soc.h"
@@ -15,7 +16,6 @@
  #include "hw/gpio/pca9552.h"
  #include "hw/nvram/eeprom_at24c.h"
-/* Anacapa hardware value */
  #define ANACAPA_BMC_HW_STRAP1 0x00002002
  #define ANACAPA_BMC_HW_STRAP2 0x00000000
  #define ANACAPA_BMC_RAM_SIZE ASPEED_RAM_SIZE(2 * GiB)
@@ -221,6 +221,14 @@ static const uint8_t hpm_brd_id_eeprom[] = {
  };
  static const size_t hpm_brd_id_eeprom_len = sizeof(hpm_brd_id_eeprom);
+static void anacapa_add_adc128d818(I2CBus *bus, uint8_t addr,
+                                   const char *description)
+{
+    DeviceState *dev = DEVICE(i2c_slave_new(TYPE_ADC128D818, addr));
+    qdev_prop_set_string(dev, "description", description);
+    i2c_slave_realize_and_unref(I2C_SLAVE(dev), bus, &error_fatal);
+}
+
  static void anacapa_bmc_i2c_init(AspeedMachineState *bmc)
  {
      /* Reference: aspeed-bmc-facebook-anacapa.dts */
@@ -259,7 +267,8 @@ static void anacapa_bmc_i2c_init(AspeedMachineState *bmc)
      i2c_mux = i2c_slave_create_simple(i2c[8], TYPE_PCA9546, 0x72);
/* i2c8mux ch0 */
-    /* adc128d818@1f — no model */
+    /* adc128d818@1f — R-PDB ADC (mode 1: 8 voltage channels) */
+    anacapa_add_adc128d818(pca954x_i2c_get_bus(i2c_mux, 0), 0x1f, "i2c8:0:1f");
      /* pca9555@22 */
      i2c_slave_create_simple(pca954x_i2c_get_bus(i2c_mux, 0),
                              TYPE_PCA9552, 0x22);
@@ -320,7 +329,8 @@ static void anacapa_bmc_i2c_init(AspeedMachineState *bmc)
      i2c_mux = i2c_slave_create_simple(i2c[13], TYPE_PCA9548, 0x70);
/* i2c13mux ch3 */
-    /* adc128d818@1f - no model */
+    /* adc128d818@1f — MB ADC (mode 1: 8 voltage channels) */
+    anacapa_add_adc128d818(pca954x_i2c_get_bus(i2c_mux, 3), 0x1f, 
"i2c13:3:1f");
/* i2c13mux ch4 */
      /* eeprom@51 */


Emmanuel,

Please keep the submitted code-review trailers from the previous
versions of the series.


Reviewed-by: Cédric Le Goater <[email protected]>

Thanks,

C.


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