On 6/17/26 12:26, Emmanuel Blot wrote:
Add QOS-based QTest coverage for the ADC128D818:
- manufacturer and revision ID registers
- power-on-reset defaults
- software reset
- voltage conversion and edge cases
- all channels with distinct values simultaneously
- temperature conversion and edge cases
- external voltage reference
- per-channel interrupt status
- INT_CLEAR bit suppresses interrupt assertion
- channel disable prevents conversion
- one-shot conversion in shutdown mode
- deep shutdown blocks conversion
- BUSY_STATUS NOT_READY flag lifecycle
- operating mode selection
- mode 2 pseudo-differential pairs
- mode 3 mixed single-ended and differential
- mode-change reset of readings and interrupt status
- QOM-triggered reconversion
Signed-off-by: Emmanuel Blot <[email protected]>
---
tests/qtest/adc128d818-test.c | 849 ++++++++++++++++++++++++++++++++++++++++++
tests/qtest/meson.build | 1 +
2 files changed, 850 insertions(+)
diff --git a/tests/qtest/adc128d818-test.c b/tests/qtest/adc128d818-test.c
new file mode 100644
index 0000000000..f8a4ba1f50
--- /dev/null
+++ b/tests/qtest/adc128d818-test.c
@@ -0,0 +1,849 @@
+/*
+ * QTest testcase for the ADC128D818 ADC
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "qemu/bitops.h"
+#include "libqos/i2c.h"
+#include "libqos/qgraph.h"
+#include "libqtest-single.h"
+#include "qobject/qdict.h"
+
+#define ADC128D818_TEST_ID "adc128d818-test"
+#define ADC128D818_TEST_ADDR 0x1F
+
+/* Register addresses */
+#define REG_CONFIG 0x00u
+#define REG_INT_STATUS 0x01u
+#define REG_INT_MASK 0x03u
+#define REG_CONV_RATE 0x07u
+#define REG_CH_DISABLE 0x08u
+#define REG_ONE_SHOT 0x09u
+#define REG_DEEP_SHUTDOWN 0x0Au
+#define REG_ADV_CONFIG 0x0Bu
+#define REG_BUSY_STATUS 0x0Cu
+
+/* Channel Reading Registers (16-bit, read-only) */
+#define REG_CH_READING_BASE 0x20u
+
+/* Limit Registers (8-bit, read/write) */
+#define REG_LIMIT_BASE 0x2Au
+
+/* ID Registers (read-only) */
+#define REG_MANUFACTURER_ID 0x3Eu
+#define REG_REVISION_ID 0x3Fu
+
+/* Configuration Register (0x00) bitfields */
+#define CONFIG_START BIT(0)
+#define CONFIG_INT_ENABLE BIT(1)
+#define CONFIG_INT_CLEAR BIT(3)
+#define CONFIG_INITIALIZATION BIT(7)
+
+/* Advanced Configuration Register (0x0B) bitfields */
+#define ADV_CONFIG_EXT_REF_EN BIT(0)
+#define ADV_CONFIG_MODE_1 (1u << 1u)
+#define ADV_CONFIG_MODE_2 (2u << 1u)
+#define ADV_CONFIG_MODE_3 (3u << 1u)
+
+/* Number of channels */
+#define NUM_CHANNELS 8u
+
+/* Internal VREF in mV */
+#define INTERNAL_VREF_MV 2560u
+
+/* TAP-compatible diagnostic output (g_test_message is silent in TAP mode) */
+#define test_log(fmt, ...) \
+ fprintf(stderr, "# " fmt "\n", ## __VA_ARGS__)
g_test_message() should be preferred
Thanks,
C.
