Hi Kuan-Jui,
On 18/6/26 12:12, Kuan-Jui Chiu wrote:
This patch add a new model for Axiado SD host controller which is compatible
with SDHCI 3.0 spec
This device model also includes a eMMC PHY which helps to control SD/eMMC
Signed-off-by: Kuan-Jui Chiu <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
---
MAINTAINERS | 2 +
hw/sd/Kconfig | 4 ++
hw/sd/axiado_sdhci.c | 114 +++++++++++++++++++++++++++++++++++
hw/sd/meson.build | 1 +
include/hw/sd/axiado_sdhci.h | 21 +++++++
5 files changed, 142 insertions(+)
create mode 100644 hw/sd/axiado_sdhci.c
create mode 100644 include/hw/sd/axiado_sdhci.h
diff --git a/hw/sd/axiado_sdhci.c b/hw/sd/axiado_sdhci.c
new file mode 100644
index 00000000000..e1a76b80a67
--- /dev/null
+++ b/hw/sd/axiado_sdhci.c
@@ -0,0 +1,114 @@
+/*
+ * Axiado SD Host Controller
"Axiado SD Host Controller with embedded PHY"
+ *
+ * Author: Kuan-Jui Chiu <[email protected]>
+ *
+ * SPDX-License-Identifier: GPL-2.0-or-later
+ */
+
+#include "qemu/osdep.h"
+#include "hw/sd/axiado_sdhci.h"
+#include "sdhci-internal.h"
+#include "qapi/error.h"
+#include "hw/core/qdev-properties.h"
+
+#define EMMC_PHY_ID 0x00
+#define EMMC_PHY_STATUS 0x50
+
+#define DLL_RDY (1u << 0)
+#define CAL_DONE (1u << 6)
+
+static uint64_t emmc_phy_read(void *opaque, hwaddr offset, unsigned size)
+{
+ uint32_t val = 0x00;
+
+ switch (offset) {
+ case EMMC_PHY_ID:
+ val = 0x3dff6870;
+ break;
+ case EMMC_PHY_STATUS:
+ val = DLL_RDY | CAL_DONE;
Out of curiosity, how long a PHY generally takes to be ready?
(We had issues with firmware when not modelling a micro delay
to allow PLLs to stabilize).
+ break;
+ default:
I suppose there are other registers, could we qemu_log_mask(LOG_UNIMP)?
+ break;
+ }
+
+ return val;
+}
+
+static void emmc_phy_write(void *opaque, hwaddr offset, uint64_t value,
+ unsigned size)
+{
Is it legal to write? Can we log LOG_UNIMP / LOG_GUEST_ERROR?
+}
+
+static const MemoryRegionOps emmc_phy_ops = {
+ .read = emmc_phy_read,
+ .write = emmc_phy_write,
+ .endianness = DEVICE_LITTLE_ENDIAN,
+ .impl = {
+ .min_access_size = 2,
Your current implementation is min_access_size = 4 (you are not
handling EMMC_PHY_ID+2). Using min_access_size = 4 is simpler,
the core memory layer will deal with the 16-bit access for you.
+ .max_access_size = 4,
+ },
+ .valid = {
+ .min_access_size = 2,
+ .max_access_size = 4,
+ }
+};
+
+static void axiado_sdhci_realize(DeviceState *dev, Error **errp)
+{
+ AxiadoSDHCIState *s = AXIADO_SDHCI(dev);
+ SysBusDevice *sbd = SYS_BUS_DEVICE(dev);
+ SysBusDevice *sdhci_sbd;
+
+ qdev_prop_set_uint64(DEVICE(&s->sdhci), "capareg", 0x216737eed0b0);
+ qdev_prop_set_uint64(DEVICE(&s->sdhci), "sd-spec-version", 3);
+
+ sdhci_sbd = SYS_BUS_DEVICE(&s->sdhci);
+ if (!sysbus_realize(sdhci_sbd, errp)) {
+ return;
+ }
+
+ sysbus_init_mmio(sbd, sysbus_mmio_get_region(sdhci_sbd, 0));
+
+ /* Propagate IRQ from SDHCI and SD bus */
+ sysbus_pass_irq(sbd, sdhci_sbd);
+ s->sd_bus = qdev_get_child_bus(DEVICE(sdhci_sbd), "sd-bus");
@sd_bus is not used AFAICT.
+
+ /* Initialize eMMC PHY MMIO */
+ memory_region_init_io(&s->emmc_phy, OBJECT(s), &emmc_phy_ops, s,
+ "axiado.emmc-phy", 0x1000);
+
+ sysbus_init_mmio(sbd, &s->emmc_phy);
+}
+
+static void axiado_sdhci_instance_init(Object *obj)
+{
+ AxiadoSDHCIState *s = AXIADO_SDHCI(obj);
+
+ object_initialize_child(OBJECT(s), "sdhci", &s->sdhci,
+ TYPE_SYSBUS_SDHCI);
+}
+
+static void axiado_sdhci_class_init(ObjectClass *klass, const void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+
+ dc->realize = axiado_sdhci_realize;
+ dc->desc = "Axiado SD Host Controller with eMMC PHY";
Shouldn't we have a reset handler to propagate to the SDHC block?
+}
+
+static const TypeInfo axiado_sdhci_info = {
+ .name = TYPE_AXIADO_SDHCI,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(AxiadoSDHCIState),
+ .instance_init = axiado_sdhci_instance_init,
+ .class_init = axiado_sdhci_class_init,
+};
+
+static void axiado_sdhci_register_types(void)
+{
+ type_register_static(&axiado_sdhci_info);
DEFINE_TYPES() is preferred for style but not required.
+}
+
+type_init(axiado_sdhci_register_types);
Regards,
Phil.
