On Wed, Jun 24, 2026 at 08:34:23AM -0700, Richard Henderson wrote:
> > +/*
> > + * Floating point to int conversion, but puts the result
> > + * in a SIMD register.
> > + */
> > +static bool do_fcvt_simd(DisasContext *s, arg_fcvt *a,
> > + ARMFPRounding rmode, bool is_signed)
> > +{
> > + TCGv_i64 tcg_int;
> > + int check = fp_access_check_scalar_hsd(s, a->esz);
> > +
> > + if (check <= 0) {
> > + return check == 0;
> > + }
> > + /*
> > + * a->sf should specify destination size (64 bit or 32 bit)
> > + * a->esz specifies source size
> > + */
> > + tcg_int = tcg_temp_new_i64();
> > + do_fcvt_scalar(s, (a->sf ? MO_64 : MO_32) | (is_signed ? MO_SIGN : 0),
> > + a->esz, tcg_int, a->shift, a->rn, rmode);
> > +
> > + if (!s->fpcr_nep) {
> > + clear_vec(s, a->rd);
> > + }
> > + write_vec_element(s, tcg_int, a->rd, 0, (a->sf ? MO_64 : MO_32));
> > + return true;
> > +}
>
> I had suggested that the same MemOp change be done to do_fcvt_f, for the
> destination.
Yes you did, apologies. It'll be in the next version.
(Resent due to missing mailing list CC)
Jim
