On Wed, 24 Jun 2026 21:59:09 +0200,
Aditya Gupta <[email protected]> wrote:
>
> >
> > Signed-off-by: Kirill A. Korinsky <[email protected]>
> > @@ -817,18 +819,15 @@ static const MemoryRegionOps pnv_psi_p9_xscom_ops = {
> > static void pnv_psi_power9_set_irq(void *opaque, int irq, int state)
> > {
> > PnvPsi *psi = opaque;
> > - uint64_t irq_method = psi->regs[PSIHB_REG(PSIHB9_INTERRUPT_CONTROL)];
> > + uint64_t irq_bit = PPC_BIT(irq);
> >
> > - if (irq_method & PSIHB9_IRQ_METHOD) {
> > - qemu_log_mask(LOG_GUEST_ERROR, "PSI: LSI IRQ method no
> > supported\n");
> > - return;
> > - }
>
> is it required to remove this check ? afais, irq_method isn't having
> this bit set by openbsd too.
>
It was very long try and fail process and it was a left over which is not
requried.
Thanks for catch it.
> > <...snip...>
> > /* Calculate number of entries */
> > - pats = 1ull << (pats + 12 - 4);
> > - if (pats <= lpid) {
> > + entries = table_size / sizeof(*entry);
>
> nit: previously sizeof(*entry) == 1<<4 = 16 bytes. just to be extra
> cautious, should we have __packed in ppc_v3_pate_t, can compilers
> increase the size of the struct any arch ? i can't think of one just
> being extra cautious
>
Addressed, will send v3 shortly.
> > +
> > +bool ppc64_v3_get_pate(PowerPCCPU *cpu, target_ulong lpid, ppc_v3_pate_t
> > *entry)
> > +{
> > + uint64_t pats = cpu->env.spr[SPR_PTCR] & PTCR_PATS;
> > +
> > + /*
> > + * Keep the existing ISA v3.0 PATS interpretation first.
> > OpenBSD/powernv
> > + * uses the PATSIZE value it writes to PTCR as one exponent smaller,
> > and it
> > + * only needs that interpretation for the bare metal LPID 0 table.
> > + */
> > + if (ppc64_v3_get_pate_from_size(cpu, lpid, entry, 1ull << (pats +
> > 12))) {
> > + return true;
> > + }
> > +
> > + if (lpid == 0) {
> > + return ppc64_v3_get_pate_from_size(cpu, lpid, entry,
> > + 1ull << (pats + 11));
>
> any reason openbsd needs to populate ptcr this way ?
>
Added explanation to comment, I think it is the better place whan maillist.
--
wbr, Kirill
