The AST2700 SSP/TSP firmware accesses OTP MMIO regions that are not yet implemented in QEMU.
This change adds unimplemented MMIO devices for the OTP and maps them to their corresponding physical addresses in the SSP/TSP address space. These stub devices allow QEMU to safely handle firmware accesses and prevent spurious exceptions, while accurately reflecting the hardware memory map. No functional changes. Signed-off-by: Jamin Lin <[email protected]> Reviewed-by: Cédric Le Goater <[email protected]> Reviewed-by: Philippe Mathieu-Daudé <[email protected]> --- include/hw/arm/aspeed_coprocessor.h | 1 + include/hw/arm/aspeed_soc.h | 1 + hw/arm/aspeed_ast27x0-ssp.c | 6 ++++++ hw/arm/aspeed_ast27x0-tsp.c | 6 ++++++ 4 files changed, 14 insertions(+) diff --git a/include/hw/arm/aspeed_coprocessor.h b/include/hw/arm/aspeed_coprocessor.h index 700cbfb4bb..ac58a5f424 100644 --- a/include/hw/arm/aspeed_coprocessor.h +++ b/include/hw/arm/aspeed_coprocessor.h @@ -49,6 +49,7 @@ struct Aspeed27x0CoprocessorState { UnimplementedDeviceState ipc[2]; UnimplementedDeviceState scuio; UnimplementedDeviceState pric[2]; + UnimplementedDeviceState otp; ARMv7MState armv7m; }; diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h index a0d2432620..41dc04e293 100644 --- a/include/hw/arm/aspeed_soc.h +++ b/include/hw/arm/aspeed_soc.h @@ -297,6 +297,7 @@ enum { ASPEED_DEV_IOEXP1_I3C, ASPEED_DEV_PRIC0, ASPEED_DEV_PRIC1, + ASPEED_DEV_OTP, }; const char *aspeed_soc_cpu_type(const char * const *valid_cpu_types); diff --git a/hw/arm/aspeed_ast27x0-ssp.c b/hw/arm/aspeed_ast27x0-ssp.c index e35c0c9a5a..68a8ab26f7 100644 --- a/hw/arm/aspeed_ast27x0-ssp.c +++ b/hw/arm/aspeed_ast27x0-ssp.c @@ -29,6 +29,7 @@ static const hwaddr aspeed_soc_ast27x0ssp_memmap[] = { [ASPEED_DEV_IPC0] = 0x72C1C000, [ASPEED_DEV_PRIC1] = 0x74100000, [ASPEED_DEV_SCUIO] = 0x74C02000, + [ASPEED_DEV_OTP] = 0x74C07000, [ASPEED_DEV_INTCIO] = 0x74C18000, [ASPEED_DEV_UART0] = 0x74C33000, [ASPEED_DEV_UART1] = 0x74C33100, @@ -147,6 +148,8 @@ static void aspeed_soc_ast27x0ssp_init(Object *obj) TYPE_UNIMPLEMENTED_DEVICE); object_initialize_child(obj, "pric1", &a->pric[1], TYPE_UNIMPLEMENTED_DEVICE); + object_initialize_child(obj, "otp", &a->otp, + TYPE_UNIMPLEMENTED_DEVICE); } static void aspeed_soc_ast27x0ssp_realize(DeviceState *dev_soc, Error **errp) @@ -267,6 +270,9 @@ static void aspeed_soc_ast27x0ssp_realize(DeviceState *dev_soc, Error **errp) aspeed_mmio_map_unimplemented(s->memory, SYS_BUS_DEVICE(&a->pric[1]), "aspeed.pric1", sc->memmap[ASPEED_DEV_PRIC1], 0x1000); + aspeed_mmio_map_unimplemented(s->memory, SYS_BUS_DEVICE(&a->otp), + "aspeed.otp", + sc->memmap[ASPEED_DEV_OTP], 0x800); } static void aspeed_soc_ast27x0ssp_class_init(ObjectClass *klass, diff --git a/hw/arm/aspeed_ast27x0-tsp.c b/hw/arm/aspeed_ast27x0-tsp.c index fdc279cbf6..b8a4f7c91d 100644 --- a/hw/arm/aspeed_ast27x0-tsp.c +++ b/hw/arm/aspeed_ast27x0-tsp.c @@ -29,6 +29,7 @@ static const hwaddr aspeed_soc_ast27x0tsp_memmap[] = { [ASPEED_DEV_IPC0] = 0x72C1C000, [ASPEED_DEV_PRIC1] = 0x74100000, [ASPEED_DEV_SCUIO] = 0x74C02000, + [ASPEED_DEV_OTP] = 0x74C07000, [ASPEED_DEV_INTCIO] = 0x74C18000, [ASPEED_DEV_UART0] = 0x74C33000, [ASPEED_DEV_UART1] = 0x74C33100, @@ -147,6 +148,8 @@ static void aspeed_soc_ast27x0tsp_init(Object *obj) TYPE_UNIMPLEMENTED_DEVICE); object_initialize_child(obj, "pric1", &a->pric[1], TYPE_UNIMPLEMENTED_DEVICE); + object_initialize_child(obj, "otp", &a->otp, + TYPE_UNIMPLEMENTED_DEVICE); } static void aspeed_soc_ast27x0tsp_realize(DeviceState *dev_soc, Error **errp) @@ -267,6 +270,9 @@ static void aspeed_soc_ast27x0tsp_realize(DeviceState *dev_soc, Error **errp) aspeed_mmio_map_unimplemented(s->memory, SYS_BUS_DEVICE(&a->pric[1]), "aspeed.pric1", sc->memmap[ASPEED_DEV_PRIC1], 0x1000); + aspeed_mmio_map_unimplemented(s->memory, SYS_BUS_DEVICE(&a->otp), + "aspeed.otp", + sc->memmap[ASPEED_DEV_OTP], 0x800); } static void aspeed_soc_ast27x0tsp_class_init(ObjectClass *klass, -- 2.43.0
