From: Richard Henderson <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>
Message-id: [email protected]
Signed-off-by: Peter Maydell <[email protected]>
---
target/arm/tcg/helper-sme-defs.h | 4 ++
target/arm/tcg/sme.decode | 2 +
target/arm/tcg/sme_helper.c | 84 ++++++++++++++++++++++++++++++++
target/arm/tcg/translate-sme.c | 16 ++++--
4 files changed, 103 insertions(+), 3 deletions(-)
diff --git a/target/arm/tcg/helper-sme-defs.h b/target/arm/tcg/helper-sme-defs.h
index 05ccb0d1e2..0e4bb12b38 100644
--- a/target/arm/tcg/helper-sme-defs.h
+++ b/target/arm/tcg/helper-sme-defs.h
@@ -371,3 +371,7 @@ DEF_HELPER_FLAGS_5(sme_ah_fmop4s_dd, TCG_CALL_NO_RWG, void,
ptr, ptr, ptr, fpst,
DEF_HELPER_FLAGS_5(sme_bfmop4a_hh, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, fpst,
i32)
DEF_HELPER_FLAGS_5(sme_bfmop4s_hh, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, fpst,
i32)
DEF_HELPER_FLAGS_5(sme_ah_bfmop4s_hh, TCG_CALL_NO_RWG, void, ptr, ptr, ptr,
fpst, i32)
+
+DEF_HELPER_FLAGS_5(sme_bfmop4a_sh, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, env,
i32)
+DEF_HELPER_FLAGS_5(sme_bfmop4s_sh, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, env,
i32)
+DEF_HELPER_FLAGS_5(sme_ah_bfmop4s_sh, TCG_CALL_NO_RWG, void, ptr, ptr, ptr,
env, i32)
diff --git a/target/arm/tcg/sme.decode b/target/arm/tcg/sme.decode
index 6021803ca0..12a3a61432 100644
--- a/target/arm/tcg/sme.decode
+++ b/target/arm/tcg/sme.decode
@@ -1105,3 +1105,5 @@ BFMOP4_hh 1000 0001 001. ...0 0000 00.. ..0. 100.
@mop4_o1
FMOP4_hh 1000 0001 000. ...0 0000 00.. ..0. 100. @mop4_o1
FMOP4_ss 1000 0000 000. ...0 0000 00.. ..0. 00.. @mop4_o2
FMOP4_dd 1000 0000 110. ...0 0000 00.. ..0. 1... @mop4_o3
+
+BFMOP4_sh 1000 0001 000. ...0 0000 00.. ..0. 00.. @mop4_o2
diff --git a/target/arm/tcg/sme_helper.c b/target/arm/tcg/sme_helper.c
index 0de7dd84e5..5a661ca616 100644
--- a/target/arm/tcg/sme_helper.c
+++ b/target/arm/tcg/sme_helper.c
@@ -2803,3 +2803,87 @@ void HELPER(sme_ah_bfmop4s_hh)(void *vza, void *vzn,
void *vzm,
{
sme_mop4(vza, vzn, vzm, fpst, desc, sizeof(bfloat16), inner_ah_bfmop4s_hh);
}
+
+static void inner_bfmop4a_sh(void *vd, void *vn, void *vm, void *vinfo)
+{
+ float32 *d = vd;
+ uint32_t *n = vn, *m = vm;
+ float_status *fpst = vinfo;
+
+ *d = bfdotadd(*d, *n, *m, fpst);
+}
+
+static void inner_ebf_bfmop4a_sh(void *vd, void *vn, void *vm, void *vinfo)
+{
+ float32 *d = vd;
+ uint32_t *n = vn, *m = vm;
+ float_status *fpst = vinfo;
+
+ *d = bfdotadd_ebf(*d, *n, *m, fpst);
+}
+
+void HELPER(sme_bfmop4a_sh)(void *vza, void *vzn, void *vzm,
+ CPUArchState *env, uint32_t desc)
+{
+ float_status fpst;
+
+ sme_mop4(vza, vzn, vzm, &fpst, desc, sizeof(float32),
+ is_ebf(env, &fpst) ? inner_ebf_bfmop4a_sh
+ : inner_bfmop4a_sh);
+}
+
+static void inner_bfmop4s_sh(void *vd, void *vn, void *vm, void *vinfo)
+{
+ float32 *d = vd;
+ uint32_t *n = vn, *m = vm;
+ float_status *fpst = vinfo;
+
+ *d = bfdotadd(*d, *n ^ 0x80008000u, *m, fpst);
+}
+
+static void inner_ebf_bfmop4s_sh(void *vd, void *vn, void *vm, void *vinfo)
+{
+ float32 *d = vd;
+ uint32_t *n = vn, *m = vm;
+ float_status *fpst = vinfo;
+
+ *d = bfdotadd_ebf(*d, *n ^ 0x80008000u, *m, fpst);
+}
+
+void HELPER(sme_bfmop4s_sh)(void *vza, void *vzn, void *vzm,
+ CPUArchState *env, uint32_t desc)
+{
+ float_status fpst;
+
+ sme_mop4(vza, vzn, vzm, &fpst, desc, sizeof(float32),
+ is_ebf(env, &fpst) ? inner_ebf_bfmop4s_sh
+ : inner_bfmop4s_sh);
+}
+
+static void inner_ah_bfmop4s_sh(void *vd, void *vn, void *vm, void *vinfo)
+{
+ float32 *d = vd;
+ uint32_t *n = vn, *m = vm;
+ float_status *fpst = vinfo;
+
+ *d = bfdotadd(*d, bf16mop_ah_neg_adj_pair(*n, -1), *m, fpst);
+}
+
+static void inner_ebf_ah_bfmop4s_sh(void *vd, void *vn, void *vm, void *vinfo)
+{
+ float32 *d = vd;
+ uint32_t *n = vn, *m = vm;
+ float_status *fpst = vinfo;
+
+ *d = bfdotadd_ebf(*d, bf16mop_ah_neg_adj_pair(*n, -1), *m, fpst);
+}
+
+void HELPER(sme_ah_bfmop4s_sh)(void *vza, void *vzn, void *vzm,
+ CPUArchState *env, uint32_t desc)
+{
+ float_status fpst;
+
+ sme_mop4(vza, vzn, vzm, &fpst, desc, sizeof(float32),
+ is_ebf(env, &fpst) ? inner_ebf_ah_bfmop4s_sh
+ : inner_ah_bfmop4s_sh);
+}
diff --git a/target/arm/tcg/translate-sme.c b/target/arm/tcg/translate-sme.c
index f833975875..df4a5c2125 100644
--- a/target/arm/tcg/translate-sme.c
+++ b/target/arm/tcg/translate-sme.c
@@ -2004,8 +2004,7 @@ TRANS_FEAT(LUTI4_s_4b, aa64_sme2p1_lutv2, do_lut_s4, a,
gen_helper_sme2_luti4_4b)
static bool do_mop4_fp(DisasContext *s, arg_mop4 *a, MemOp esz,
- ARMFPStatusFlavour e_fpst,
- gen_helper_gvec_3_ptr * const fns[3])
+ int e_fpst, gen_helper_gvec_3_ptr * const fns[3])
{
int svl = streaming_vec_reg_size(s);
uint32_t desc = simd_desc(svl, svl, (a->m << 1) | a->n);
@@ -2019,7 +2018,11 @@ static bool do_mop4_fp(DisasContext *s, arg_mop4 *a,
MemOp esz,
za = get_tile(s, esz, a->zad);
zn = vec_full_reg_ptr(s, a->zn);
zm = vec_full_reg_ptr(s, a->zm);
- fpst = fpstatus_ptr(e_fpst);
+ if (e_fpst >= 0) {
+ fpst = fpstatus_ptr(e_fpst);
+ } else {
+ fpst = tcg_env;
+ }
fns[fns_idx](za, zn, zm, fpst, tcg_constant_i32(desc));
return true;
@@ -2055,3 +2058,10 @@ static gen_helper_gvec_3_ptr * const fmop4_dd[3] = {
};
TRANS_FEAT(FMOP4_dd, aa64_sme_mop4_f64f64,
do_mop4_fp, a, MO_64, FPST_ZA, fmop4_dd)
+
+static gen_helper_gvec_3_ptr * const bfmop4_sh[3] = {
+ gen_helper_sme_bfmop4a_sh,
+ gen_helper_sme_bfmop4s_sh,
+ gen_helper_sme_ah_bfmop4s_sh
+};
+TRANS_FEAT(BFMOP4_sh, aa64_sme_mop4, do_mop4_fp, a, MO_32, FPST_ENV, bfmop4_sh)
--
2.43.0
