From: Richard Henderson <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>
Message-id: [email protected]
Signed-off-by: Peter Maydell <[email protected]>
---
target/arm/cpu-features.h | 5 ++++
target/arm/tcg/helper-sme-defs.h | 4 +++
target/arm/tcg/sme.decode | 3 +++
target/arm/tcg/sme_helper.c | 42 ++++++++++++++++++++++++++++++++
target/arm/tcg/translate-sme.c | 8 ++++++
5 files changed, 62 insertions(+)
diff --git a/target/arm/cpu-features.h b/target/arm/cpu-features.h
index e480995cc6..a1a4f37277 100644
--- a/target/arm/cpu-features.h
+++ b/target/arm/cpu-features.h
@@ -1807,6 +1807,11 @@ isar_feature_aa64_sme_f16f16_or_f8f16(const
ARMISARegisters *id)
return isar_feature_aa64_sme_f16f16(id) || isar_feature_aa64_sme_f8f16(id);
}
+static inline bool isar_feature_aa64_sme_mop4_f16f16(const ARMISARegisters *id)
+{
+ return isar_feature_aa64_sme_mop4(id) && isar_feature_aa64_sme_f16f16(id);
+}
+
/*
* Feature tests for "does this exist in either 32-bit or 64-bit?"
*/
diff --git a/target/arm/tcg/helper-sme-defs.h b/target/arm/tcg/helper-sme-defs.h
index 9e1f09ce5b..ec7389d2ae 100644
--- a/target/arm/tcg/helper-sme-defs.h
+++ b/target/arm/tcg/helper-sme-defs.h
@@ -356,6 +356,10 @@ DEF_HELPER_FLAGS_5(sme2_sel_h, TCG_CALL_NO_RWG, void, ptr,
ptr, ptr, i32, i32)
DEF_HELPER_FLAGS_5(sme2_sel_s, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32, i32)
DEF_HELPER_FLAGS_5(sme2_sel_d, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32, i32)
+DEF_HELPER_FLAGS_5(sme_fmop4a_hh, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, fpst,
i32)
+DEF_HELPER_FLAGS_5(sme_fmop4s_hh, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, fpst,
i32)
+DEF_HELPER_FLAGS_5(sme_ah_fmop4s_hh, TCG_CALL_NO_RWG, void, ptr, ptr, ptr,
fpst, i32)
+
DEF_HELPER_FLAGS_5(sme_fmop4a_ss, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, fpst,
i32)
DEF_HELPER_FLAGS_5(sme_fmop4s_ss, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, fpst,
i32)
DEF_HELPER_FLAGS_5(sme_ah_fmop4s_ss, TCG_CALL_NO_RWG, void, ptr, ptr, ptr,
fpst, i32)
diff --git a/target/arm/tcg/sme.decode b/target/arm/tcg/sme.decode
index 5a3d47cdfe..227f3d7790 100644
--- a/target/arm/tcg/sme.decode
+++ b/target/arm/tcg/sme.decode
@@ -1094,7 +1094,10 @@ LUTI4_s_4b 1100 0000 1001 101 1 00 00 00 ....0
zd:5 \
%mop4_zm 17:3 !function=times_2_plus_16
%mop4_zn 6:3 !function=times_2
+@mop4_o1 .... .... ... m:1 .... .... .. n:1 ... . s:1 ... zad:1 \
+ &mop4 zm=%mop4_zm zn=%mop4_zn
@mop4_o2 .... .... ... m:1 .... .... .. n:1 ... . s:1 .. zad:2 \
&mop4 zm=%mop4_zm zn=%mop4_zn
+FMOP4_hh 1000 0001 000. ...0 0000 00.. ..0. 100. @mop4_o1
FMOP4_ss 1000 0000 000. ...0 0000 00.. ..0. 00.. @mop4_o2
diff --git a/target/arm/tcg/sme_helper.c b/target/arm/tcg/sme_helper.c
index b08d91e6de..c4d149f7f7 100644
--- a/target/arm/tcg/sme_helper.c
+++ b/target/arm/tcg/sme_helper.c
@@ -2636,6 +2636,48 @@ void sme_mop4(void *vza, void *vzn, void *vzm, void
*fn_opaque,
}
}
+static void inner_fmop4a_hh(void *vd, void *vn, void *vm, void *vinfo)
+{
+ float16 *d = vd, *n = vn, *m = vm;
+ float_status *fpst = vinfo;
+
+ *d = float16_muladd(*n, *m, *d, 0, fpst);
+}
+
+void HELPER(sme_fmop4a_hh)(void *vza, void *vzn, void *vzm,
+ float_status *fpst, uint32_t desc)
+{
+ sme_mop4(vza, vzn, vzm, fpst, desc, sizeof(float16), inner_fmop4a_hh);
+}
+
+static void inner_fmop4s_hh(void *vd, void *vn, void *vm, void *vinfo)
+{
+ float16 *d = vd, *n = vn, *m = vm;
+ float_status *fpst = vinfo;
+
+ *d = float16_muladd(float16_chs(*n), *m, *d, 0, fpst);
+}
+
+void HELPER(sme_fmop4s_hh)(void *vza, void *vzn, void *vzm,
+ float_status *fpst, uint32_t desc)
+{
+ sme_mop4(vza, vzn, vzm, fpst, desc, sizeof(float16), inner_fmop4s_hh);
+}
+
+static void inner_ah_fmop4s_hh(void *vd, void *vn, void *vm, void *vinfo)
+{
+ float16 *d = vd, *n = vn, *m = vm;
+ float_status *fpst = vinfo;
+
+ *d = float16_muladd(*n, *m, *d, float_muladd_negate_product, fpst);
+}
+
+void HELPER(sme_ah_fmop4s_hh)(void *vza, void *vzn, void *vzm,
+ float_status *fpst, uint32_t desc)
+{
+ sme_mop4(vza, vzn, vzm, fpst, desc, sizeof(float16), inner_ah_fmop4s_hh);
+}
+
static void inner_fmop4a_ss(void *vd, void *vn, void *vm, void *vinfo)
{
float32 *d = vd, *n = vn, *m = vm;
diff --git a/target/arm/tcg/translate-sme.c b/target/arm/tcg/translate-sme.c
index aab5eab9df..d19cd274ac 100644
--- a/target/arm/tcg/translate-sme.c
+++ b/target/arm/tcg/translate-sme.c
@@ -2025,6 +2025,14 @@ static bool do_mop4_fp(DisasContext *s, arg_mop4 *a,
MemOp esz,
return true;
}
+static gen_helper_gvec_3_ptr * const fmop4_hh[3] = {
+ gen_helper_sme_fmop4a_hh,
+ gen_helper_sme_fmop4s_hh,
+ gen_helper_sme_ah_fmop4s_hh
+};
+TRANS_FEAT(FMOP4_hh, aa64_sme_mop4_f16f16,
+ do_mop4_fp, a, MO_16, FPST_ZA_F16, fmop4_hh)
+
static gen_helper_gvec_3_ptr * const fmop4_ss[3] = {
gen_helper_sme_fmop4a_ss,
gen_helper_sme_fmop4s_ss,
--
2.43.0
