From: Richard Henderson <[email protected]>
Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>
Message-id: [email protected]
Signed-off-by: Peter Maydell <[email protected]>
---
target/arm/cpu-features.h | 5 +++++
target/arm/tcg/helper-sme-defs.h | 4 ++++
target/arm/tcg/sme.decode | 2 ++
target/arm/tcg/sme_helper.c | 19 +++++++++++++++++++
target/arm/tcg/translate-sme.c | 4 ++++
5 files changed, 34 insertions(+)
diff --git a/target/arm/cpu-features.h b/target/arm/cpu-features.h
index 29b4f99aeb..fb5ed25ad0 100644
--- a/target/arm/cpu-features.h
+++ b/target/arm/cpu-features.h
@@ -1832,6 +1832,11 @@ static inline bool
isar_feature_aa64_sme_mop4_f8f16(const ARMISARegisters *id)
return isar_feature_aa64_sme_mop4(id) && isar_feature_aa64_sme_f8f16(id);
}
+static inline bool isar_feature_aa64_sme_mop4_i16i64(const ARMISARegisters *id)
+{
+ return isar_feature_aa64_sme_mop4(id) && isar_feature_aa64_sme_i16i64(id);
+}
+
/*
* Feature tests for "does this exist in either 32-bit or 64-bit?"
*/
diff --git a/target/arm/tcg/helper-sme-defs.h b/target/arm/tcg/helper-sme-defs.h
index ddf771e446..070a1a2c1d 100644
--- a/target/arm/tcg/helper-sme-defs.h
+++ b/target/arm/tcg/helper-sme-defs.h
@@ -382,3 +382,7 @@ DEF_HELPER_FLAGS_5(sme_ah_fmop4s_sh, TCG_CALL_NO_RWG, void,
ptr, ptr, ptr, env,
DEF_HELPER_FLAGS_4(sme_smop4a_sh, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
DEF_HELPER_FLAGS_4(sme_smop4s_sh, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_4(sme_smop4a_sb, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_4(sme_smop4s_sb, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_4(sme_smop4a_dh, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
+DEF_HELPER_FLAGS_4(sme_smop4s_dh, TCG_CALL_NO_RWG, void, ptr, ptr, ptr, i32)
diff --git a/target/arm/tcg/sme.decode b/target/arm/tcg/sme.decode
index 20a2febd63..16f86a9d2d 100644
--- a/target/arm/tcg/sme.decode
+++ b/target/arm/tcg/sme.decode
@@ -1118,3 +1118,5 @@ FMOP4A_sb 1000 0000 001. ...0 0000 00.. ..00 00..
@mop4_o2_s0
FMOP4A_hb 1000 0000 001. ...0 0000 00.. ..00 100. @mop4_o1_s0
SMOP4_sh 1000 0000 000. ...0 1000 00.. ..0. 10.. @mop4_o2
+SMOP4_sb 1000 0000 000. ...0 1000 00.. ..0. 00.. @mop4_o2
+SMOP4_dh 1010 0000 110. ...0 0000 00.. ..0. 1... @mop4_o3
diff --git a/target/arm/tcg/sme_helper.c b/target/arm/tcg/sme_helper.c
index 32fe867a3b..11d9d509ec 100644
--- a/target/arm/tcg/sme_helper.c
+++ b/target/arm/tcg/sme_helper.c
@@ -2954,3 +2954,22 @@ IMOP4_2WAY(smop4a_sh, +, int32_t, int16_t, int16_t)
IMOP4_2WAY(smop4s_sh, -, int32_t, int16_t, int16_t)
#undef IMOP4_2WAY
+
+#define IMOP4_4WAY(NAME, OP, TYPED, TYPEN, TYPEM) \
+static void inner_##NAME(void *vd, void *vn, void *vm, void *vinfo) \
+{ \
+ TYPEN *n = vn; TYPEM *m = vm; TYPED *d = vd; \
+ *d OP##= (TYPED)n[0] * m[0] + (TYPED)n[1] * m[1] + \
+ (TYPED)n[2] * m[2] + (TYPED)n[3] * m[3]; \
+} \
+void HELPER(sme_##NAME)(void *vza, void *vzn, void *vzm, uint32_t desc) \
+{ \
+ sme_mop4(vza, vzn, vzm, NULL, desc, sizeof(TYPED), inner_##NAME); \
+}
+
+IMOP4_4WAY(smop4a_sb, +, int32_t, int8_t, int8_t)
+IMOP4_4WAY(smop4s_sb, -, int32_t, int8_t, int8_t)
+IMOP4_4WAY(smop4a_dh, +, int64_t, int16_t, int16_t)
+IMOP4_4WAY(smop4s_dh, -, int64_t, int16_t, int16_t)
+
+#undef IMOP4_4WAY
diff --git a/target/arm/tcg/translate-sme.c b/target/arm/tcg/translate-sme.c
index b948591dd3..6f3806f4de 100644
--- a/target/arm/tcg/translate-sme.c
+++ b/target/arm/tcg/translate-sme.c
@@ -2110,3 +2110,7 @@ static bool do_mop4_int(DisasContext *s, arg_mop4 *a,
MemOp esz,
TRANS_FEAT(SMOP4_sh, aa64_sme_mop4, do_mop4_int, a, MO_32,
a->s ? gen_helper_sme_smop4s_sh : gen_helper_sme_smop4a_sh)
+TRANS_FEAT(SMOP4_sb, aa64_sme_mop4, do_mop4_int, a, MO_32,
+ a->s ? gen_helper_sme_smop4s_sb : gen_helper_sme_smop4a_sb)
+TRANS_FEAT(SMOP4_dh, aa64_sme_mop4_i16i64, do_mop4_int, a, MO_64,
+ a->s ? gen_helper_sme_smop4s_dh : gen_helper_sme_smop4a_dh)
--
2.43.0
