Add implied rules to enable the implied extensions of Zvfofp8min extension recursively.
Reviewed-by: Chao Liu <[email protected]> Reviewed-by: Alistair Francis <[email protected]> Signed-off-by: Max Chou <[email protected]> --- target/riscv/cpu.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index 38c580a22a..8cd1a5e056 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -2668,6 +2668,15 @@ static RISCVCPUImpliedExtsRule ZVFHMIN_IMPLIED = { }, }; +static RISCVCPUImpliedExtsRule ZVFOFP8MIN_IMPLIED = { + .ext = CPU_CFG_OFFSET(ext_zvfofp8min), + .implied_multi_exts = { + CPU_CFG_OFFSET(ext_zve32f), + + RISCV_IMPLIED_EXTS_RULE_END + }, +}; + static RISCVCPUImpliedExtsRule ZVKN_IMPLIED = { .ext = CPU_CFG_OFFSET(ext_zvkn), .implied_multi_exts = { @@ -2826,7 +2835,7 @@ RISCVCPUImpliedExtsRule *riscv_multi_ext_implied_rules[] = { &ZKS_IMPLIED, &ZVBB_IMPLIED, &ZVE32F_IMPLIED, &ZVE32X_IMPLIED, &ZVE64D_IMPLIED, &ZVE64F_IMPLIED, &ZVE64X_IMPLIED, &ZVFBFA_IMPLIED, &ZVFBFMIN_IMPLIED, &ZVFBFWMA_IMPLIED, - &ZVFH_IMPLIED, &ZVFHMIN_IMPLIED, &ZVKN_IMPLIED, + &ZVFH_IMPLIED, &ZVFHMIN_IMPLIED, &ZVFOFP8MIN_IMPLIED, &ZVKN_IMPLIED, &ZVKNC_IMPLIED, &ZVKNG_IMPLIED, &ZVKNHB_IMPLIED, &ZVKS_IMPLIED, &ZVKSC_IMPLIED, &ZVKSG_IMPLIED, &SHA_IMPLIED, &SSCFG_IMPLIED, &SUPM_IMPLIED, &SSPM_IMPLIED, &SMCTR_IMPLIED, -- 2.55.0
