On Thu, Jul 9, 2026 at 12:58 PM Alistair Francis <[email protected]> wrote:
> On Tue, Jul 7, 2026 at 7:11 PM <[email protected]> wrote: > > > > From: Frank Chang <[email protected]> > > > > Support the true Zicclsm extension so that we can trap misaligned > accesses > > when Zicclsm is disabled. > > > > To enable/disable Zicclsm, simply set zicclsm=[true|false], e.g.: > > -cpu rv64,zicclsm=[true|false] > > > > QEMU will raise a misaligned load/store exception when executing > misaligned > > load/store instructions if Zicclsm is disabled. > > > > Changelog: > > v4: > > * Align ROM reset vector data at 8-byte aligned offsets. > > v3: > > * Enable Zicclsm for the compatible CPUs. > > * Rebase to the latest riscv-to-apply.next. > > v2: > > * Use (size_memop(size) | mo_endian_env(env)) to calculate MemOp. > > * Use (log2_esz << MO_ASHIFT) to calculate aligment MemOp for > > vector load/store whole register instructions. > > > > Frank Chang (6): > > target/riscv: Add Zicclsm CPU option > > target/riscv: Support raising misaligned exceptions for scalar > > loads/stores > > target/riscv: Support raising misaligned exceptions for vector > > loads/stores > > target/riscv: Enable Zicclsm for the compatible CPUs > > hw/riscv: sifive_u: Align ROM reset vector data > > target/riscv: Update Zicclsm ISA string and expose it as a CPU > > property > > Hmmm.... Still seeing failures > > 556/556 qemu:func-quick+func-riscv64 / func-riscv64-opensbi > TIMEOUT 90.02s killed by signal 15 SIGTERM > >>> > LD_LIBRARY_PATH=/var/mnt/scratch/alistair/software/qemu/build/contrib/plugins:/var/mnt/scratch/alistair/software/qemu/build/tests/tcg/plugins > MSAN_OPTIO > NS=halt_on_error=1:abort_on_error=1:print_summary=1:print_stacktrace=1 > > QEMU_TEST_QEMU_BINARY=/var/mnt/scratch/alistair/software/qemu/build/qemu-system-riscv > 64 RUST_BACKTRACE=1 > MESON_BUILD_ROOT=/var/mnt/scratch/alistair/software/qemu/build > UBSAN_OPTIONS=halt_on_error=1:abort_on_error=1:print_summary=1:print_stac > ktrace=1 ASAN_OPTIONS=halt_on_error=1:abort_on_error=1:print_summary=1 > MESON_TEST_ITERATION=1 MALLOC_PERTURB_=7 > QEMU_TEST_QEMU_IMG=/var/mnt/scratch/alistair > /software/qemu/build/qemu-img QEMU_TEST_GDB=/usr/bin/gdb > > PYTHONPATH=/var/mnt/scratch/alistair/software/qemu/python:/var/mnt/scratch/alistair/software/qemu/t > ests/functional > /var/mnt/scratch/alistair/software/qemu/build/pyvenv/bin/python3 > /var/mnt/scratch/alistair/software/qemu/tests/functional/riscv64/test_opens > bi.py > > > Summary of Failures: > > 556/556 qemu:func-quick+func-riscv64 / func-riscv64-opensbi > TIMEOUT 90.02s killed by signal 15 SIGTERM > > Hi Alistair, That's weird. I ran: $ meson test -C build qemu:func-riscv64-opensbi -v --print-errorlog ..... ▶ 1/1 test_opensbi.RiscvOpenSBI.test_riscv_sifive_u OK ▶ 1/1 test_opensbi.RiscvOpenSBI.test_riscv_spike OK ▶ 1/1 test_opensbi.RiscvOpenSBI.test_riscv_tt_atlantis OK ▶ 1/1 test_opensbi.RiscvOpenSBI.test_riscv_virt OK 1/1 func-quick+func-riscv64 - qemu:func-riscv64-opensbi OK 1.53s 4 subtests passed Ok: 1 Fail: 0 func-riscv64-opensbi test passed. However, I did find another issue when I ran: $ meson test -C build "qemu:*riscv*" [1/9] Generating qemu-version.h with a custom command (wrapped by meson to capture output) 1/39 func-quick+func-riscv64 - qemu:func-riscv64-linters SKIP 0.15s 0 subtests passed 2/39 func-quick+func-riscv64 - qemu:func-riscv64-empty_cpu_model OK 0.21s 1 subtests passed 3/39 func-quick+func-riscv64 - qemu:func-riscv64-version OK 0.25s 1 subtests passed 4/39 func-quick+func-riscv32 - qemu:func-riscv32-linters SKIP 0.23s 0 subtests passed 5/39 qtest+qtest-riscv64 - qemu:qtest-riscv64/machine-none-test OK 0.17s 1 subtests passed 6/39 func-quick+func-riscv64 - qemu:func-riscv64-info_usernet OK 0.33s 1 subtests passed 7/39 func-quick+func-riscv32 - qemu:func-riscv32-empty_cpu_model OK 0.29s 1 subtests passed 8/39 qtest+qtest-riscv64 - qemu:qtest-riscv64/readconfig-test OK 0.19s 1 subtests passed 9/39 qtest+qtest-riscv64 - qemu:qtest-riscv64/cdrom-test OK 0.41s 1 subtests passed 10/39 qtest+qtest-riscv32 - qemu:qtest-riscv32/cdrom-test OK 0.41s 1 subtests passed 11/39 func-quick+func-riscv32 - qemu:func-riscv32-info_usernet OK 0.31s 1 subtests passed 12/39 func-quick+func-riscv32 - qemu:func-riscv32-version OK 0.29s 1 subtests passed 13/39 qtest+qtest-riscv64 - qemu:qtest-riscv64/riscv-csr-test OK 0.30s 1 subtests passed 14/39 func-quick+func-riscv64 - qemu:func-riscv64-vnc SKIP 0.39s 0 subtests passed 15/39 qtest+qtest-riscv32 - qemu:qtest-riscv32/machine-none-test OK 0.15s 1 subtests passed 16/39 qtest+qtest-riscv32 - qemu:qtest-riscv32/readconfig-test OK 0.13s 1 subtests passed 17/39 func-quick+func-riscv32 - qemu:func-riscv32-vnc SKIP 0.40s 0 subtests passed 18/39 qtest+qtest-riscv64 - qemu:qtest-riscv64/qmp-test OK 0.54s 4 subtests passed 19/39 func-quick+func-riscv64 - qemu:func-riscv64-migration OK 0.80s 3 subtests passed 20/39 func-quick+func-riscv32 - qemu:func-riscv32-migration OK 0.77s 3 subtests passed 21/39 qtest+qtest-riscv32 - qemu:qtest-riscv32/qmp-test OK 0.52s 4 subtests passed 22/39 func-quick+func-riscv64 - qemu:func-riscv64-opensbi OK 0.85s 3 subtests passed 23/39 qtest+qtest-riscv64 - qemu:qtest-riscv64/iommu-riscv-test OK 0.76s 4 subtests passed 24/39 func-quick+func-riscv32 - qemu:func-riscv32-opensbi OK 0.87s 3 subtests passed 25/39 qtest+qtest-riscv64 - qemu:qtest-riscv64/k230-wdt-test OK 1.06s 7 subtests passed 26/39 qtest+qtest-riscv32 - qemu:qtest-riscv32/sifive-e-aon-watchdog-test OK 1.29s 10 subtests passed 27/39 qtest+qtest-riscv32 - qemu:qtest-riscv32/qom-test OK 2.22s 8 subtests passed 28/39 qtest+qtest-riscv32 - qemu:qtest-riscv32/device-introspect-test OK 2.28s 6 subtests passed 29/39 qtest+qtest-riscv64 - qemu:qtest-riscv64/device-introspect-test OK 2.58s 6 subtests passed 30/39 qtest+qtest-riscv32 - qemu:qtest-riscv32/test-hmp OK 3.26s 8 subtests passed 31/39 qtest+qtest-riscv64 - qemu:qtest-riscv64/netdev-socket OK 3.32s 10 subtests passed 32/39 qtest+qtest-riscv32 - qemu:qtest-riscv32/netdev-socket OK 3.30s 10 subtests passed 33/39 qtest+qtest-riscv64 - qemu:qtest-riscv64/qom-test OK 3.80s 12 subtests passed 34/39 qtest+qtest-riscv64 - qemu:qtest-riscv64/test-hmp OK 5.48s 12 subtests passed 35/39 qtest+qtest-riscv64 - qemu:qtest-riscv64/qmp-cmd-test OK 8.44s 64 subtests passed 36/39 qtest+qtest-riscv32 - qemu:qtest-riscv32/qmp-cmd-test OK 8.43s 64 subtests passed 37/39 qtest+qtest-riscv64 - qemu:qtest-riscv64/bios-tables-test ERROR 17.02s killed by signal 6 SIGABRT >>> MESON_TEST_ITERATION=1 PYTHON=/scratch3/yihaoc/sifive/qemu/build/pyvenv/bin/python3 QTEST_QEMU_IMG=./qemu-img ASAN_OPTIONS=halt_on_error=1:abort_on_error=1:print_summary=1 MSAN_OPTIONS=halt_on_error=1:abort_on_error=1:print_summary=1:print_stacktrace=1 G_TEST_DBUS_DAEMON=/scratch3/yihaoc/sifive/qemu/tests/dbus-daemon.sh QTEST_QEMU_STORAGE_DAEMON_BINARY=./storage-daemon/qemu-storage-daemon UBSAN_OPTIONS=halt_on_error=1:abort_on_error=1:print_summary=1:print_stacktrace=1 RUST_BACKTRACE=1 MALLOC_PERTURB_=162 QTEST_QEMU_BINARY=./qemu-system-riscv64 /scratch3/yihaoc/sifive/qemu/build/tests/qtest/bios-tables-test --tap -k 38/39 qtest+qtest-riscv32 - qemu:qtest-riscv32/qos-test OK 43.47s 191 subtests passed 39/39 qtest+qtest-riscv64 - qemu:qtest-riscv64/qos-test OK 43.82s 191 subtests passed Ok: 34 Fail: 1 Skipped: 4 The failure is because Zicclsm is mandatory in the RVA22U64 profile. But before this patchset, ZIcclsm was enabled automatically when has_priv_1_11 was true. With this patchset, Zicclsm must be explicitly added to the RVA22U64 profile's extension list. After the fix, running: $ meson test -C build "qemu:*riscv*" [1/9] Generating qemu-version.h with a custom command (wrapped by meson to capture output) 1/41 func-quick+func-riscv64 - qemu:func-riscv64-linters SKIP 0.15s 0 subtests passed 2/41 func-quick+func-riscv64 - qemu:func-riscv64-empty_cpu_model OK 0.19s 1 subtests passed 3/41 func-quick+func-riscv64 - qemu:func-riscv64-info_usernet OK 0.26s 1 subtests passed 4/41 func-quick+func-riscv32 - qemu:func-riscv32-linters SKIP 0.21s 0 subtests passed 5/41 func-quick+func-riscv32 - qemu:func-riscv32-empty_cpu_model OK 0.24s 1 subtests passed 6/41 func-quick+func-riscv64 - qemu:func-riscv64-version OK 0.30s 1 subtests passed 7/41 qtest+qtest-riscv64 - qemu:qtest-riscv64/cdrom-test OK 0.39s 1 subtests passed 8/41 qtest+qtest-riscv64 - qemu:qtest-riscv64/machine-none-test OK 0.17s 1 subtests passed 9/41 qtest+qtest-riscv32 - qemu:qtest-riscv32/cdrom-test OK 0.42s 1 subtests passed 10/41 func-quick+func-riscv32 - qemu:func-riscv32-version OK 0.28s 1 subtests passed 11/41 func-quick+func-riscv32 - qemu:func-riscv32-info_usernet OK 0.32s 1 subtests passed 12/41 func-quick+func-riscv64 - qemu:func-riscv64-vnc SKIP 0.35s 0 subtests passed 13/41 qtest+qtest-riscv64 - qemu:qtest-riscv64/riscv-csr-test OK 0.30s 1 subtests passed 14/41 qtest+qtest-riscv64 - qemu:qtest-riscv64/readconfig-test OK 0.15s 1 subtests passed 15/41 func-quick+func-riscv32 - qemu:func-riscv32-vnc SKIP 0.33s 0 subtests passed 16/41 qtest+qtest-riscv32 - qemu:qtest-riscv32/machine-none-test OK 0.14s 1 subtests passed 17/41 qtest+qtest-riscv32 - qemu:qtest-riscv32/readconfig-test OK 0.14s 1 subtests passed 18/41 func-quick+func-riscv64 - qemu:func-riscv64-migration OK 0.75s 3 subtests passed 19/41 func-quick+func-riscv32 - qemu:func-riscv32-migration OK 0.78s 3 subtests passed 20/41 func-quick+func-riscv32 - qemu:func-riscv32-opensbi OK 0.84s 3 subtests passed 21/41 qtest+qtest-riscv64 - qemu:qtest-riscv64/iommu-riscv-test OK 0.78s 4 subtests passed 22/41 qtest+qtest-riscv64 - qemu:qtest-riscv64/k230-wdt-test OK 1.08s 7 subtests passed 23/41 qtest+qtest-riscv64 - qemu:qtest-riscv64/qmp-test OK 1.16s 9 subtests passed 24/41 qtest+qtest-riscv32 - qemu:qtest-riscv32/qmp-test OK 1.14s 9 subtests passed 25/41 qtest+qtest-riscv32 - qemu:qtest-riscv32/sifive-e-aon-watchdog-test OK 1.28s 10 subtests passed 26/41 func-quick+func-riscv64 - qemu:func-riscv64-opensbi OK 1.81s 4 subtests passed 27/41 qtest+qtest-riscv32 - qemu:qtest-riscv32/qom-test OK 2.06s 8 subtests passed 28/41 qtest+qtest-riscv32 - qemu:qtest-riscv32/device-introspect-test OK 2.19s 6 subtests passed 29/41 qtest+qtest-riscv64 - qemu:qtest-riscv64/device-introspect-test OK 2.48s 6 subtests passed 30/41 qtest+qtest-riscv32 - qemu:qtest-riscv32/test-hmp OK 3.27s 8 subtests passed 31/41 func-quick+func-riscv32 - qemu:func-riscv32-monitor_hotplug OK 3.46s 7 subtests passed 32/41 qtest+qtest-riscv64 - qemu:qtest-riscv64/netdev-socket OK 3.32s 10 subtests passed 33/41 qtest+qtest-riscv32 - qemu:qtest-riscv32/netdev-socket OK 3.31s 10 subtests passed 34/41 func-quick+func-riscv64 - qemu:func-riscv64-monitor_hotplug OK 4.00s 7 subtests passed 35/41 qtest+qtest-riscv64 - qemu:qtest-riscv64/qom-test OK 4.40s 13 subtests passed 36/41 qtest+qtest-riscv64 - qemu:qtest-riscv64/test-hmp OK 6.63s 13 subtests passed 37/41 qtest+qtest-riscv64 - qemu:qtest-riscv64/qmp-cmd-test OK 8.45s 64 subtests passed 38/41 qtest+qtest-riscv32 - qemu:qtest-riscv32/qmp-cmd-test OK 8.50s 64 subtests passed 39/41 qtest+qtest-riscv64 - qemu:qtest-riscv64/bios-tables-test OK 35.13s 3 subtests passed 40/41 qtest+qtest-riscv64 - qemu:qtest-riscv64/qos-test OK 46.41s 192 subtests passed 41/41 qtest+qtest-riscv32 - qemu:qtest-riscv32/qos-test OK 46.45s 192 subtests passed Ok: 37 Fail: 0 Skipped: 4 All the tests passed. I will send out the v5 patchset to fix the issue. BTW, I noticed you ran more tests than I did. Could you please share your test command so I can reproduce it on my end? Regards, Frank Chang > > Alistair > > > > > hw/riscv/sifive_u.c | 11 +++-- > > target/riscv/cpu.c | 9 +++- > > target/riscv/cpu_cfg_fields.h.inc | 2 + > > target/riscv/insn_trans/trans_rvi.c.inc | 6 +++ > > target/riscv/insn_trans/trans_rvv.c.inc | 18 +++++-- > > target/riscv/vector_helper.c | 65 +++++++++++++++++++------ > > 6 files changed, 87 insertions(+), 24 deletions(-) > > > > -- > > 2.43.0 > > > > >
