MSHV exposes overlapping legacy FP/SSE state through two paths: explicit Hyper-V FPU/XMM + registers and VP XSAVE state. There can be subtle inconsistencies across migrations when XSAVE is written after FPU state.
Signed-off-by: Magnus Kulke <[email protected]> --- target/i386/mshv/mshv-cpu.c | 9 +++++---- 1 file changed, 5 insertions(+), 4 deletions(-) diff --git a/target/i386/mshv/mshv-cpu.c b/target/i386/mshv/mshv-cpu.c index bff1ac9d17..f528dd2b9a 100644 --- a/target/i386/mshv/mshv-cpu.c +++ b/target/i386/mshv/mshv-cpu.c @@ -1057,7 +1057,7 @@ int mshv_arch_load_vcpu_state(CPUState *cpu) return ret; } - ret = get_fpu(cpu); + ret = get_xsave_state(cpu); if (ret < 0) { return ret; } @@ -1072,7 +1072,7 @@ int mshv_arch_load_vcpu_state(CPUState *cpu) return ret; } - ret = get_xsave_state(cpu); + ret = get_fpu(cpu); if (ret < 0) { return ret; } @@ -1551,7 +1551,7 @@ int mshv_arch_store_vcpu_state(const CPUState *cpu) return ret; } - ret = set_fpu(cpu); + ret = set_xsave_state(cpu); if (ret < 0) { return ret; } @@ -1567,7 +1567,8 @@ int mshv_arch_store_vcpu_state(const CPUState *cpu) return ret; } - ret = set_xsave_state(cpu); + /* INVARIANT: legacy FPU state must be restored after XSAVE */ + ret = set_fpu(cpu); if (ret < 0) { return ret; } -- 2.34.1
