Convert the *_orphan() device-creation calls in the hw/arm strongarm board files to the new parented API introduced earlier in this series, so every onboard device gets a stable path in the composition tree instead of landing in /machine/unattached with an unstable device[N] name.
The parent for each device is the object that owns its lifetime: the machine for board-created devices, the containing SoC device for composite children. Names follow existing QOM conventions. Per-site rationale (reviewers: dispute the modeling here): hw/arm/collie.c:67 | sysbus_create_simple | OBJECT(machine) | "scoop" | Board .init(MachineState *machine); single instance. hw/arm/strongarm.c:649 | qdev_new | parent (threaded) | "gpio" | strongarm_gpio_init() static helper: added Object *parent as first arg, threaded from sa1110_init(). Paired sysbus_realize_and_unref -> sysbus_realize. hw/arm/strongarm.c:1623 | cpu_create | parent (threaded) | "cpu" | sa1110_init() has no parent-capable pointer; added Object *parent as first arg (prototype in strongarm.h updated), threaded from collie_init() with OBJECT(machine). hw/arm/strongarm.c:1625 | sysbus_create_varargs | parent | "pic" | sa1110_init(); single PIC. hw/arm/strongarm.c:1630 | sysbus_create_varargs | parent | "timer" | sa1110_init(); single timer. hw/arm/strongarm.c:1637 | sysbus_create_simple | parent | "rtc" | sa1110_init(); single RTC. hw/arm/strongarm.c:1642 | sysbus_create_varargs | parent | "ppc" | sa1110_init(); single PPC. hw/arm/strongarm.c:1645 | qdev_new | parent | "uart[*]" | sa1110_init(); loop over sa_serial[]. Paired sysbus_realize_and_unref -> sysbus_realize. hw/arm/strongarm.c:1654 | sysbus_create_varargs | parent | "ssp" | sa1110_init(); single SSP. Link: https://lore.kernel.org/qemu-devel/[email protected]/ Assisted-by: Kiro Signed-off-by: Alexander Graf <[email protected]> --- hw/arm/collie.c | 4 ++-- hw/arm/strongarm.c | 27 ++++++++++++++------------- hw/arm/strongarm.h | 2 +- 3 files changed, 17 insertions(+), 16 deletions(-) diff --git a/hw/arm/collie.c b/hw/arm/collie.c index b3646daa3b..afd4e14315 100644 --- a/hw/arm/collie.c +++ b/hw/arm/collie.c @@ -52,7 +52,7 @@ static void collie_init(MachineState *machine) exit(EXIT_FAILURE); } - cms->sa1110 = sa1110_init(machine->cpu_type); + cms->sa1110 = sa1110_init(OBJECT(machine), machine->cpu_type); memory_region_add_subregion(get_system_memory(), SA_SDCS0, machine->ram); @@ -64,7 +64,7 @@ static void collie_init(MachineState *machine) FLASH_SECTOR_SIZE, 4, 0x00, 0x00, 0x00, 0x00, 0); } - sysbus_create_simple_orphan("scoop", 0x40800000, NULL); + sysbus_create_simple(OBJECT(machine), "scoop", "scoop", 0x40800000, NULL); collie_binfo.board_id = 0x208; arm_load_kernel(cms->sa1110->cpu, machine, &collie_binfo); diff --git a/hw/arm/strongarm.c b/hw/arm/strongarm.c index 1704db8baa..0b3b56218a 100644 --- a/hw/arm/strongarm.c +++ b/hw/arm/strongarm.c @@ -640,14 +640,14 @@ static const MemoryRegionOps strongarm_gpio_ops = { .endianness = DEVICE_NATIVE_ENDIAN, }; -static DeviceState *strongarm_gpio_init(hwaddr base, +static DeviceState *strongarm_gpio_init(Object *parent, hwaddr base, DeviceState *pic) { DeviceState *dev; int i; - dev = qdev_new_orphan(TYPE_STRONGARM_GPIO); - sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); + dev = qdev_new(parent, "gpio", TYPE_STRONGARM_GPIO); + sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, base); for (i = 0; i < 12; i++) @@ -1608,7 +1608,7 @@ static const TypeInfo strongarm_ssp_info = { }; /* Main CPU functions */ -StrongARMState *sa1110_init(const char *cpu_type) +StrongARMState *sa1110_init(Object *parent, const char *cpu_type) { StrongARMState *s; int i; @@ -1620,38 +1620,39 @@ StrongARMState *sa1110_init(const char *cpu_type) exit(1); } - s->cpu = ARM_CPU(cpu_create_orphan(cpu_type)); + s->cpu = ARM_CPU(cpu_create(parent, "cpu", cpu_type)); - s->pic = sysbus_create_varargs_orphan("strongarm_pic", 0x90050000, + s->pic = sysbus_create_varargs(parent, "pic", "strongarm_pic", 0x90050000, qdev_get_gpio_in(DEVICE(s->cpu), ARM_CPU_IRQ), qdev_get_gpio_in(DEVICE(s->cpu), ARM_CPU_FIQ), NULL); - sysbus_create_varargs_orphan("pxa25x-timer", 0x90000000, + sysbus_create_varargs(parent, "timer", "pxa25x-timer", 0x90000000, qdev_get_gpio_in(s->pic, SA_PIC_OSTC0), qdev_get_gpio_in(s->pic, SA_PIC_OSTC1), qdev_get_gpio_in(s->pic, SA_PIC_OSTC2), qdev_get_gpio_in(s->pic, SA_PIC_OSTC3), NULL); - sysbus_create_simple_orphan(TYPE_STRONGARM_RTC, 0x90010000, + sysbus_create_simple(parent, "rtc", TYPE_STRONGARM_RTC, 0x90010000, qdev_get_gpio_in(s->pic, SA_PIC_RTC_ALARM)); - s->gpio = strongarm_gpio_init(0x90040000, s->pic); + s->gpio = strongarm_gpio_init(parent, 0x90040000, s->pic); - s->ppc = sysbus_create_varargs_orphan(TYPE_STRONGARM_PPC, 0x90060000, NULL); + s->ppc = sysbus_create_varargs(parent, "ppc", TYPE_STRONGARM_PPC, + 0x90060000, NULL); for (i = 0; sa_serial[i].io_base; i++) { - DeviceState *dev = qdev_new_orphan(TYPE_STRONGARM_UART); + DeviceState *dev = qdev_new(parent, "uart[*]", TYPE_STRONGARM_UART); qdev_prop_set_chr(dev, "chardev", serial_hd(i)); - sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); + sysbus_realize(SYS_BUS_DEVICE(dev), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, sa_serial[i].io_base); sysbus_connect_irq(SYS_BUS_DEVICE(dev), 0, qdev_get_gpio_in(s->pic, sa_serial[i].irq)); } - s->ssp = sysbus_create_varargs_orphan(TYPE_STRONGARM_SSP, 0x80070000, + s->ssp = sysbus_create_varargs(parent, "ssp", TYPE_STRONGARM_SSP, 0x80070000, qdev_get_gpio_in(s->pic, SA_PIC_SSP), NULL); s->ssp_bus = (SSIBus *)qdev_get_child_bus(s->ssp, "ssi"); diff --git a/hw/arm/strongarm.h b/hw/arm/strongarm.h index b11b3a3379..72bb9e075c 100644 --- a/hw/arm/strongarm.h +++ b/hw/arm/strongarm.h @@ -62,6 +62,6 @@ typedef struct { SSIBus *ssp_bus; } StrongARMState; -StrongARMState *sa1110_init(const char *cpu_type); +StrongARMState *sa1110_init(Object *parent, const char *cpu_type); #endif -- 2.47.1
