Convert the *_orphan() device-creation calls in the hw/arm mps2 board files to the new parented API introduced earlier in this series, so every onboard device gets a stable path in the composition tree instead of landing in /machine/unattached with an unstable device[N] name.
The parent for each device is the object that owns its lifetime: the machine for board-created devices, the containing SoC device for composite children. Names follow existing QOM conventions. Per-site rationale (reviewers: dispute the modeling here): hw/arm/mps2.c:302 | qdev_new_orphan | OBJECT(mms) | "uart[*]" | board init (mps2_common_init), MPS2MachineState *mms is machine; indexed loop; drop _and_unref hw/arm/mps2.c:346 | qdev_new_orphan | OBJECT(mms) | "uart[*]" | board init, second FPGA variant loop; auto-index; drop _and_unref hw/arm/mps2.c:419 | sysbus_create_simple_orphan | OBJECT(mms) | "spi[*]" | board init; PL022 external ADC; auto-index shared with loop below hw/arm/mps2.c:438 | sysbus_create_simple_orphan | OBJECT(mms) | "spi[*]" | board init; PL022 in nested loop; auto-index hw/arm/mps2.c:449 | sysbus_create_simple_orphan | OBJECT(mms) | "i2c[*]" | board init; SBCON I2C in loop; auto-index hw/arm/mps2-tz.c:511 | qdev_new_orphan | OBJECT(mms) | "lan9118" | make_eth_dev helper receives MPS2TZMachineState *mms (board state); single instance; drop _and_unref hw/arm/mps2-tz.c:538 | qdev_new_orphan | OBJECT(mms) | "lan9118" | make_eth_usb helper receives mms; single instance (mutually exclusive with make_eth_dev per board); drop _and_unref Link: https://lore.kernel.org/qemu-devel/[email protected]/ Assisted-by: Kiro Signed-off-by: Alexander Graf <[email protected]> --- hw/arm/mps2-tz.c | 8 ++++---- hw/arm/mps2.c | 18 ++++++++++-------- 2 files changed, 14 insertions(+), 12 deletions(-) diff --git a/hw/arm/mps2-tz.c b/hw/arm/mps2-tz.c index c0ab898f2e..17945d2b71 100644 --- a/hw/arm/mps2-tz.c +++ b/hw/arm/mps2-tz.c @@ -508,11 +508,11 @@ static MemoryRegion *make_eth_dev(MPS2TZMachineState *mms, void *opaque, /* In hardware this is a LAN9220; the LAN9118 is software compatible * except that it doesn't support the checksum-offload feature. */ - mms->lan9118 = qdev_new_orphan(TYPE_LAN9118); + mms->lan9118 = qdev_new(OBJECT(mms), "lan9118", TYPE_LAN9118); qemu_configure_nic_device(mms->lan9118, true, NULL); s = SYS_BUS_DEVICE(mms->lan9118); - sysbus_realize_and_unref(s, &error_fatal); + sysbus_realize(s, &error_fatal); sysbus_connect_irq(s, 0, get_sse_irq_in(mms, irqs[0])); return sysbus_mmio_get_region(s, 0); } @@ -535,11 +535,11 @@ static MemoryRegion *make_eth_usb(MPS2TZMachineState *mms, void *opaque, * In hardware this is a LAN9220; the LAN9118 is software compatible * except that it doesn't support the checksum-offload feature. */ - mms->lan9118 = qdev_new_orphan(TYPE_LAN9118); + mms->lan9118 = qdev_new(OBJECT(mms), "lan9118", TYPE_LAN9118); qemu_configure_nic_device(mms->lan9118, true, NULL); s = SYS_BUS_DEVICE(mms->lan9118); - sysbus_realize_and_unref(s, &error_fatal); + sysbus_realize(s, &error_fatal); sysbus_connect_irq(s, 0, get_sse_irq_in(mms, irqs[0])); memory_region_add_subregion(&mms->eth_usb_container, diff --git a/hw/arm/mps2.c b/hw/arm/mps2.c index e646c7c71e..2edd222674 100644 --- a/hw/arm/mps2.c +++ b/hw/arm/mps2.c @@ -299,11 +299,11 @@ static void mps2_common_init(MachineState *machine) rxovrint = qdev_get_gpio_in(orgate_dev, i * 2 + 1); } - dev = qdev_new_orphan(TYPE_CMSDK_APB_UART); + dev = qdev_new(OBJECT(mms), "uart[*]", TYPE_CMSDK_APB_UART); s = SYS_BUS_DEVICE(dev); qdev_prop_set_chr(dev, "chardev", serial_hd(i)); qdev_prop_set_uint32(dev, "pclk-frq", SYSCLK_FRQ); - sysbus_realize_and_unref(s, &error_fatal); + sysbus_realize(s, &error_fatal); sysbus_mmio_map(s, 0, uartbase[i]); sysbus_connect_irq(s, 0, qdev_get_gpio_in(armv7m, uartirq[i] + 1)); sysbus_connect_irq(s, 1, qdev_get_gpio_in(armv7m, uartirq[i])); @@ -343,11 +343,11 @@ static void mps2_common_init(MachineState *machine) qdev_connect_gpio_out(txrx_orgate_dev, 0, qdev_get_gpio_in(armv7m, uart_txrx_irqno[i])); - dev = qdev_new_orphan(TYPE_CMSDK_APB_UART); + dev = qdev_new(OBJECT(mms), "uart[*]", TYPE_CMSDK_APB_UART); s = SYS_BUS_DEVICE(dev); qdev_prop_set_chr(dev, "chardev", serial_hd(i)); qdev_prop_set_uint32(dev, "pclk-frq", SYSCLK_FRQ); - sysbus_realize_and_unref(s, &error_fatal); + sysbus_realize(s, &error_fatal); sysbus_mmio_map(s, 0, uartbase[i]); sysbus_connect_irq(s, 0, qdev_get_gpio_in(txrx_orgate_dev, 0)); sysbus_connect_irq(s, 1, qdev_get_gpio_in(txrx_orgate_dev, 1)); @@ -416,8 +416,8 @@ static void mps2_common_init(MachineState *machine) qdev_prop_set_uint32(DEVICE(&mms->fpgaio), "prescale-clk", 25000000); sysbus_realize(SYS_BUS_DEVICE(&mms->fpgaio), &error_fatal); sysbus_mmio_map(SYS_BUS_DEVICE(&mms->fpgaio), 0, 0x40028000); - sysbus_create_simple_orphan(TYPE_PL022, 0x40025000, /* External ADC */ - qdev_get_gpio_in(armv7m, 22)); + sysbus_create_simple(OBJECT(mms), "spi[*]", TYPE_PL022, 0x40025000, + qdev_get_gpio_in(armv7m, 22)); /* External ADC */ for (i = 0; i < 2; i++) { static const int spi_irqno[] = {11, 24}; static const hwaddr spibase[] = {0x40020000, /* APB */ @@ -435,7 +435,8 @@ static void mps2_common_init(MachineState *machine) qdev_connect_gpio_out(orgate_dev, 0, qdev_get_gpio_in(armv7m, spi_irqno[i])); for (j = 0; j < 2; j++) { - sysbus_create_simple_orphan(TYPE_PL022, spibase[2 * i + j], + sysbus_create_simple(OBJECT(mms), "spi[*]", TYPE_PL022, + spibase[2 * i + j], qdev_get_gpio_in(orgate_dev, j)); } } @@ -446,7 +447,8 @@ static void mps2_common_init(MachineState *machine) 0x4002a000}; /* Shield1 */ DeviceState *dev; - dev = sysbus_create_simple_orphan(TYPE_ARM_SBCON_I2C, i2cbase[i], NULL); + dev = sysbus_create_simple(OBJECT(mms), "i2c[*]", + TYPE_ARM_SBCON_I2C, i2cbase[i], NULL); if (i < 2) { /* * internal-only bus: mark it full to avoid user-created -- 2.47.1
