AST2700 supports a 64-bit DRAM address space. Therefore, DMA transactions must be capable of accessing 64-bit addresses.
Enable the "caps-64bit-addr" property for the EHCI controllers on AST2700 so that USB DMA operations can correctly handle 64-bit memory addresses. Signed-off-by: Jamin Lin <[email protected]> Reviewed-by: Cédric Le Goater <[email protected]> Reviewed-by: Philippe Mathieu-Daudé <[email protected]> --- hw/arm/aspeed_ast27x0.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c index 0b56d2bb67..7c062580f2 100644 --- a/hw/arm/aspeed_ast27x0.c +++ b/hw/arm/aspeed_ast27x0.c @@ -873,6 +873,8 @@ static void aspeed_soc_ast2700_realize(DeviceState *dev, Error **errp) object_property_set_int(OBJECT(&s->ehci[i]), "ctrldssegment-default", sc->memmap[ASPEED_DEV_SDRAM] >> 32, &error_abort); + object_property_set_bool(OBJECT(&s->ehci[i]), "caps-64bit-addr", true, + &error_abort); if (!sysbus_realize(SYS_BUS_DEVICE(&s->ehci[i]), errp)) { return; } -- 2.43.0
