Xorg acceleration (XAA) makes use of the indirect buffer for 2D operations. Instead of writing packets directly to the ring buffer, they are written to indirect buffers and then referenced by a small packet on the ring.
Signed-off-by: Chad Jablonski <[email protected]> --- hw/display/ati.c | 22 ++++++++++++++++++++++ hw/display/ati_int.h | 2 ++ hw/display/ati_regs.h | 2 ++ 3 files changed, 26 insertions(+) diff --git a/hw/display/ati.c b/hw/display/ati.c index d758e652b5..0c550599cc 100644 --- a/hw/display/ati.c +++ b/hw/display/ati.c @@ -623,6 +623,12 @@ static uint64_t ati_mm_read(void *opaque, hwaddr addr, unsigned int size) case CP_RB_WPTR: val = s->regs.cp_rb_wptr; break; + case CP_IB_BASE: + val = s->regs.cp_ib_base; + break; + case CP_IB_BUFSZ: + val = s->regs.cp_ib_bufsz; + break; default: break; } @@ -1175,6 +1181,22 @@ void ati_mm_write(void *opaque, hwaddr addr, } break; } + case CP_IB_BASE: + s->regs.cp_ib_base = data & 0xfffffffc; + break; + case CP_IB_BUFSZ: { + uint32_t bufsz = data & 0x007fffff; + uint32_t base = s->regs.cp_ib_base; + ATIPktState ib_pkt = {0}; + uint32_t dwords = 0; + s->regs.cp_ib_bufsz = bufsz; + while (dwords < bufsz) { + uint32_t offs = base + dwords * sizeof(uint32_t); + ati_pkt_receive_data(s, &ib_pkt, ati_mc_read(s, offs)); + dwords += 1; + } + break; + } default: break; } diff --git a/hw/display/ati_int.h b/hw/display/ati_int.h index 00fb03c4b4..df08b6ae01 100644 --- a/hw/display/ati_int.h +++ b/hw/display/ati_int.h @@ -129,6 +129,8 @@ typedef struct ATIVGARegs { uint32_t cp_rb_cntl; uint32_t cp_rb_rptr; uint32_t cp_rb_wptr; + uint32_t cp_ib_base; + uint32_t cp_ib_bufsz; } ATIVGARegs; typedef struct ATIHostDataState { diff --git a/hw/display/ati_regs.h b/hw/display/ati_regs.h index 755b9656b1..e8e1b90374 100644 --- a/hw/display/ati_regs.h +++ b/hw/display/ati_regs.h @@ -134,7 +134,9 @@ #define PM4_VC_VLOFF 0x0730 #define PM4_VC_VLSIZE 0x0734 #define PM4_IW_INDOFF 0x0738 +#define CP_IB_BASE 0x0738 #define PM4_IW_INDSIZE 0x073c +#define CP_IB_BUFSZ 0x073c #define PM4_FPU_FPX0 0x0740 #define CP_CSQ_CNTL 0x0740 #define PM4_FPU_FPY0 0x0744 -- 2.54.0
