This series implements the CP engine for the r100. This includes the ring buffer, indirect buffer, and packet processing for Type-0/1/2 packets. Type-3 packet processing is left for a future series.
* Patches 1-3: 2D engine differences discovered for the r100 * Patches 4-5: Implement and use the GPU memory controller * Patch 6: Type-0/1/2 packet processing * Patches 7-8: Ring and indirect buffer implementation * Patch 9: Scratch registers used for fencing Tested with Debian Squeeze (kernel 2.6.32) booting with the radeon.modeset=0 kernel arg. Xorg initializes and basic fills work. An xterm window is displayed but unfortunately, the driver uses a Type-3 packet for host data blits. So glyphs will not yet render. Tested on Radeon QY (RV100) (PCI 1002:5159). Hardware tests available at: https://codeberg.org/cjab/ati-tests/src/commit/5c3efeb0bcebdc7e6f780bb6c5d3a8dfd7a65e35/tests/r100/cce.c https://codeberg.org/cjab/ati-tests/src/commit/5c3efeb0bcebdc7e6f780bb6c5d3a8dfd7a65e35/tests/r100/pitch_offset_cntl.c Chad Jablonski (9): ati-vga: r100 scissor dimensions are exclusive ati-vga: r100 does not latch defaults on DP_GUI_MASTER_CNTL ati-vga: r100 pitch registers differ from r128 ati-vga: Route GPU addresses with memory controller ati-vga: Route r100 src and dst offsets through memory controller ati-vga: Process Type-0/1/2 CP packets ati-vga: CP engine ring buffer ati-vga: CP engine indirect buffer ati-vga: Scratch registers hw/display/ati.c | 221 ++++++++++++++++++++++++++++++++++++---- hw/display/ati_2d.c | 52 ++++++++-- hw/display/ati_int.h | 74 ++++++++++++++ hw/display/ati_pkt.c | 151 +++++++++++++++++++++++++++ hw/display/ati_regs.h | 20 ++++ hw/display/meson.build | 3 +- hw/display/trace-events | 9 ++ 7 files changed, 498 insertions(+), 32 deletions(-) create mode 100644 hw/display/ati_pkt.c -- 2.54.0
