This short series fixes a regression in semihosting's automatic string length detection for 32‑bit targets, introduced when target_ulong was replaced with uint64_t. The first patch restores the original behaviour where passing -1 (0xffffffff) in arg2 triggers the auto‑length logic by detecting the 32‑bit sentinel and promoting it to the 64‑bit equivalent.
The second patch extends the TCG test suite with a new RISC‑V 32‑bit semihosting test that exercises SYS_OPEN with auto‑length, verifying that the fix works correctly on qemu-system-riscv32. Signed-off-by: Nikita Shubin <[email protected]> --- Changes in v2: - Added tags. - Link to v1: https://lore.kernel.org/qemu-devel/20260619-fix-sign-extended-32-bit-addresses-v1-0-47ae14f8e...@maquefel.me --- Nikita Shubin (2): semihosting/arm-compat-semi: Fix auto‑strlen detection for 32‑bit targets tests/tcg/riscv32: Add RISC-V 32-bit semihosting test configure | 6 +++- semihosting/arm-compat-semi.c | 11 ++++++ tests/tcg/riscv32/Makefile.softmmu-target | 30 +++++++++++++++++ tests/tcg/riscv32/semihost.ld | 24 +++++++++++++ tests/tcg/riscv32/test-semihosting-open.S | 56 +++++++++++++++++++++++++++++++ 5 files changed, 126 insertions(+), 1 deletion(-) --- base-commit: 6333226c2abb72f31648c251624c56e70993d625 change-id: 20260619-fix-sign-extended-32-bit-addresses-68eba061cd9a Best regards, -- Nikita Shubin
