On Fri, 24 Jul 2026 at 04:12, Richard Henderson
<[email protected]> wrote:
>
> It is IMPLEMENTATION DEFINED whether HCR_EL2.TID3 traps on registers
> within the range which are not explicitly listed. Previously we chose
> not to honor the TID3 bit.
>
> However, with FEAT_IDTE3 it becomes mandatory to honor SCR_EL3.TID3
> on these registers
NB that it's mandatory to honour HCR_EL2.TID3 if FEAT_FGT is present,
and we already choose to do so for V8. It's only V7 where we don't.
>, so we might as well honor HCR_EL2.TID3 too.
I'm not in favour of this, because there's some complicated
history behind HCR_EL2.TID3, as outlined in the commit message
of 205ca535ab ("target/arm: Correctly honour HCR.TID3 for v7A cores").
I would prefer to leave the trap behaviour as it is now [i.e.
"on v7, trap only the specific registers; on v8, take the IMPDEF
choice to trap the whole range"], because the wording in the
v7A Arm ARM is rather vague. I also have a feeling that I looked at real
v7A h/w and it didn't trap these, but I might be misremembering.
thanks
-- PMM
