On Sun, 2026-08-09 at 15:35 -0700, Richard Henderson wrote: > Move the table to riscv-xlrbr-op.c.inc and massage > the lines into OP() form. Drop illegal as unused. > Return pointers to objects directly. > > Signed-off-by: Richard Henderson <[email protected]>
Reviewed-by: Alistair Francis <[email protected]> Alistair > --- > disas/riscv-xlrbr.c | 54 +++++++++--------------------------- > -- > disas/riscv-xlrbr-op.c.inc | 8 ++++++ > 2 files changed, 20 insertions(+), 42 deletions(-) > create mode 100644 disas/riscv-xlrbr-op.c.inc > > diff --git a/disas/riscv-xlrbr.c b/disas/riscv-xlrbr.c > index b12916c9da..b4229e5c83 100644 > --- a/disas/riscv-xlrbr.c > +++ b/disas/riscv-xlrbr.c > @@ -8,38 +8,16 @@ > */ > > #include "qemu/osdep.h" > - > #include "disas/riscv.h" > #include "disas/riscv-xlrbr.h" > > -typedef enum { > - /* 0 is reserved for rv_op_illegal. */ > - rv_op_crc32_b = 1, > - rv_op_crc32_h = 2, > - rv_op_crc32_w = 3, > - rv_op_crc32_d = 4, > - rv_op_crc32c_b = 5, > - rv_op_crc32c_h = 6, > - rv_op_crc32c_w = 7, > - rv_op_crc32c_d = 8, > -} rv_xlrbr_op; > - > -static const rv_opcode_data xlrbr_opcode_data[] = { > - { "illegal", rv_codec_illegal, rv_fmt_none }, > - { "crc32.b", rv_codec_r, rv_fmt_rd_rs1 }, > - { "crc32.h", rv_codec_r, rv_fmt_rd_rs1 }, > - { "crc32.w", rv_codec_r, rv_fmt_rd_rs1 }, > - { "crc32.d", rv_codec_r, rv_fmt_rd_rs1 }, > - { "crc32c.b", rv_codec_r, rv_fmt_rd_rs1 }, > - { "crc32c.h", rv_codec_r, rv_fmt_rd_rs1 }, > - { "crc32c.w", rv_codec_r, rv_fmt_rd_rs1 }, > - { "crc32c.d", rv_codec_r, rv_fmt_rd_rs1 }, > -}; > +#define OP(N, ...) static const rv_opcode_data op_##N = { > __VA_ARGS__ }; > +#include "riscv-xlrbr-op.c.inc" > +#undef OP > > const rv_opcode_data *decode_xlrbr(rv_decode *dec, rv_isa isa) > { > rv_inst inst = dec->inst; > - rv_opcode op = rv_op_illegal; > > switch ((inst >> 0) & 0b1111111) { > case 0b0010011: > @@ -47,34 +25,26 @@ const rv_opcode_data *decode_xlrbr(rv_decode > *dec, rv_isa isa) > case 0b001: > switch ((inst >> 20 & 0b111111111111)) { > case 0b011000010000: > - op = rv_op_crc32_b; > - break; > + return &op_crc32_b; > case 0b011000010001: > - op = rv_op_crc32_h; > - break; > + return &op_crc32_h; > case 0b011000010010: > - op = rv_op_crc32_w; > - break; > + return &op_crc32_w; > case 0b011000010011: > - op = rv_op_crc32_d; > - break; > + return &op_crc32_d; > case 0b011000011000: > - op = rv_op_crc32c_b; > - break; > + return &op_crc32c_b; > case 0b011000011001: > - op = rv_op_crc32c_h; > - break; > + return &op_crc32c_h; > case 0b011000011010: > - op = rv_op_crc32c_w; > - break; > + return &op_crc32c_w; > case 0b011000011011: > - op = rv_op_crc32c_d; > - break; > + return &op_crc32c_d; > } > break; > } > break; > } > > - return op == rv_op_illegal ? NULL : &xlrbr_opcode_data[op]; > + return NULL; > } > diff --git a/disas/riscv-xlrbr-op.c.inc b/disas/riscv-xlrbr-op.c.inc > new file mode 100644 > index 0000000000..57add37c24 > --- /dev/null > +++ b/disas/riscv-xlrbr-op.c.inc > @@ -0,0 +1,8 @@ > +OP(crc32_b, "crc32.b", rv_codec_r, rv_fmt_rd_rs1) > +OP(crc32_h, "crc32.h", rv_codec_r, rv_fmt_rd_rs1) > +OP(crc32_w, "crc32.w", rv_codec_r, rv_fmt_rd_rs1) > +OP(crc32_d, "crc32.d", rv_codec_r, rv_fmt_rd_rs1) > +OP(crc32c_b, "crc32c.b", rv_codec_r, rv_fmt_rd_rs1) > +OP(crc32c_h, "crc32c.h", rv_codec_r, rv_fmt_rd_rs1) > +OP(crc32c_w, "crc32c.w", rv_codec_r, rv_fmt_rd_rs1) > +OP(crc32c_d, "crc32c.d", rv_codec_r, rv_fmt_rd_rs1)
