On Mon, Aug 10, 2026 at 04:29:50PM +0800, Tina Zhang wrote: > Date: Mon, 10 Aug 2026 16:29:50 +0800 > From: Tina Zhang <[email protected]> > Subject: [PATCH v2 3/9] target/i386: Hide ARCH_CAPABILITIES for Hygon > X-Mailer: git-send-email 2.43.7 > > IA32_ARCH_CAPABILITIES is an Intel-defined MSR. KVM can synthesize the > CPUID bit and read-only MSR for non-Intel guests, and QEMU already hides > that interface for AMD CPU models because Windows may not expect it on > AMD-compatible CPUs. > > Hygon Dhyana uses the HygonGenuine vendor string, so it currently skips > that AMD filter. If arch-capabilities=on is requested, QEMU can expose > CPUID.7.0.EDX[ARCH_CAPABILITIES] and the associated MSR feature word to > a Hygon guest. > > That creates a vendor-inconsistent CPU ABI: the guest sees an > AMD-compatible vendor and cache/topology interface, but also sees an > Intel-specific architectural capabilities MSR. Guests that choose CPU > mitigation or feature paths from the vendor can mis-handle that > combination; Windows is known to be sensitive to ARCH_CAPABILITIES on > AMD-compatible CPUs. > > Apply the same ARCH_CAPABILITIES hiding rule to Hygon CPUs when the vendor > CPU ABI compat gate is enabled. Keep arch_cap_always_on as the migration > escape hatch, and keep the old Hygon CPUID/MSR output for pc-11.0 and > older machine types via x-hygon-vendor-abi-fixes=false.
Nit: pc-11.1? Same applies to the other commit messages. Thanks, Zhao
