On Mon, Aug 10, 2026 at 04:29:51PM +0800, Tina Zhang wrote: > Date: Mon, 10 Aug 2026 16:29:51 +0800 > From: Tina Zhang <[email protected]> > Subject: [PATCH v2 4/9] target/i386/kvm: Use AMD MCE status encoding for > Hygon > X-Mailer: git-send-email 2.43.7 > > QEMU's KVM memory-failure injection path builds synthetic MCI_STATUS > records for the guest CPU. The status encoding is vendor-specific: > Intel-style records use bits such as MCI_STATUS_S and MCI_STATUS_AR for > action-required events, while the AMD path uses the AMD memory-failure > encoding. > > Today QEMU selects the AMD status encoding only for AuthenticAMD guests. > Hygon guests should use the AMD status encoding as well, but currently > get Intel-style injected status bits, including MCI_STATUS_S and > MCI_STATUS_AR for action-required events, and a non-deferred > action-optional record. That can prevent a guest OS running on the Hygon > CPU model from handling the injected MCE correctly. > > Use the AMD injected-memory-failure MCE status encoding for Hygon guests > as well. This does not depend on Hygon exposing CPUID 0x80000007.EBX > recovery features such as SUCCOR, and it does not advertise any new > recovery capability. The change is limited to QEMU's synthetic KVM > memory-failure MCE status; it does not change CPUID, MCE bank state, or > migrated CPU state. > > Signed-off-by: Tina Zhang <[email protected]> > --- > target/i386/kvm/kvm.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Zhao Liu <[email protected]>
