@env argument is accessed without modification in hexagon_thread_is_enabled(), qualify it as const.
Signed-off-by: Philippe Mathieu-Daudé <[email protected]> Reviewed-by: Marc-André Lureau <[email protected]> Reviewed-by: Brian Cain <[email protected]> --- target/hexagon/cpu.h | 2 +- target/hexagon/cpu_helper.h | 4 ++-- target/hexagon/cpu.c | 4 ++-- target/hexagon/cpu_helper.c | 6 +++--- 4 files changed, 8 insertions(+), 8 deletions(-) diff --git a/target/hexagon/cpu.h b/target/hexagon/cpu.h index c50fbb3f72a..e4f120eda17 100644 --- a/target/hexagon/cpu.h +++ b/target/hexagon/cpu.h @@ -216,7 +216,7 @@ G_NORETURN void hexagon_raise_exception_err(CPUHexagonState *env, * @return true if the @a thread_env hardware thread is * not stopped. */ -bool hexagon_thread_is_enabled(CPUHexagonState *thread_env); +bool hexagon_thread_is_enabled(const CPUHexagonState *thread_env); uint32_t hexagon_greg_read(CPUHexagonState *env, uint32_t reg); void hexagon_cpu_soft_reset(CPUHexagonState *env); #endif diff --git a/target/hexagon/cpu_helper.h b/target/hexagon/cpu_helper.h index d1767503156..a669091a89d 100644 --- a/target/hexagon/cpu_helper.h +++ b/target/hexagon/cpu_helper.h @@ -9,8 +9,8 @@ uint32_t hexagon_get_pmu_counter(CPUHexagonState *cur_env, int index); void hexagon_modify_ssr(CPUHexagonState *env, uint32_t new, uint32_t old); -int get_cpu_mode(CPUHexagonState *env); -int get_exe_mode(CPUHexagonState *env); +int get_cpu_mode(const CPUHexagonState *env); +int get_exe_mode(const CPUHexagonState *env); void clear_wait_mode(CPUHexagonState *env); void hexagon_ssr_set_cause(CPUHexagonState *env, uint32_t cause); void hexagon_start_threads(CPUHexagonState *env, uint32_t mask); diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c index 9765716b516..4cc6bd67c28 100644 --- a/target/hexagon/cpu.c +++ b/target/hexagon/cpu.c @@ -345,9 +345,9 @@ static void hexagon_cpu_synchronize_from_tb(CPUState *cs, } #ifndef CONFIG_USER_ONLY -bool hexagon_thread_is_enabled(CPUHexagonState *env) +bool hexagon_thread_is_enabled(const CPUHexagonState *env) { - HexagonCPU *cpu = env_archcpu(env); + const HexagonCPU *cpu = env_archcpu(env); uint32_t modectl; uint32_t thread_enabled_mask; bool E_bit; diff --git a/target/hexagon/cpu_helper.c b/target/hexagon/cpu_helper.c index 64c5746c6d9..610e29a0503 100644 --- a/target/hexagon/cpu_helper.c +++ b/target/hexagon/cpu_helper.c @@ -212,9 +212,9 @@ void hexagon_ssr_set_cause(CPUHexagonState *env, uint32_t cause) } -int get_exe_mode(CPUHexagonState *env) +int get_exe_mode(const CPUHexagonState *env) { - HexagonCPU *cpu; + const HexagonCPU *cpu; uint32_t modectl, thread_enabled_mask, thread_wait_mask; uint32_t isdbst, debugmode; bool E_bit, W_bit, D_bit; @@ -384,7 +384,7 @@ static int sys_in_user_mode_ssr(uint32_t ssr) return 0; } -int get_cpu_mode(CPUHexagonState *env) +int get_cpu_mode(const CPUHexagonState *env) { uint32_t ssr = env->t_sreg[HEX_SREG_SSR]; -- 2.53.0
