From: TANG Tiancheng <[email protected]>
rv_codec_r2_imm6 is used for XThead instructions whose 6-bit
immediate field is encoded in bits 25:20. The old expression
left-shifted by 38 and then right-shifted by 60, so it kept only
bits 25:22.
Use extract32() to decode bits 25:20 directly. This fixes the
immediate printed for th.srri and th.tst.
Fixes: 318df7238b9f ("disas/riscv: Add support for XThead* instructions")
Suggested-by: Alex Bennée <[email protected]>
Signed-off-by: TANG Tiancheng <[email protected]>
Reviewed-by: LIU Zhiwei <[email protected]>
Reviewed-by: Daniel Henrique Barboza <[email protected]>
Reviewed-by: Alistair Francis <[email protected]>
Message-ID:
<20260703-b4-disas-xthead-fix-riscv-next-v4-2-84c566330...@linux.alibaba.com>
Signed-off-by: Alistair Francis <[email protected]>
(cherry picked from commit 7a8454ef293085a45686929577b7d5a5daded242)
Signed-off-by: Michael Tokarev <[email protected]>
diff --git a/disas/riscv.c b/disas/riscv.c
index 2d8add32127..692765cd32f 100644
--- a/disas/riscv.c
+++ b/disas/riscv.c
@@ -4538,7 +4538,7 @@ static uint32_t operand_zcmp_rlist(rv_inst inst)
static uint32_t operand_imm6(rv_inst inst)
{
- return (inst << 38) >> 60;
+ return extract32(inst, 20, 6);
}
static uint32_t operand_imm2(rv_inst inst)
--
2.47.3
