[PATCH 11/13] hw/riscv/trace-encoder.c: add remaining fields to trace-encoder

[Konstantin Semichastnov]

Add remaining unsupported register bits to trace-encoder as read-only zero

Signed-off-by: Konstantin Semichastnov <antikost...@gmail.com>
---
 hw/riscv/trace-encoder.c | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/hw/riscv/trace-encoder.c b/hw/riscv/trace-encoder.c
index c36d205f50..58ed4b2646 100644
--- a/hw/riscv/trace-encoder.c
+++ b/hw/riscv/trace-encoder.c
@@ -68,6 +68,8 @@ REG32(TR_TE_CONTROL, 0x0)
     FIELD(TR_TE_CONTROL, EMPTY, 3, 1)
     FIELD(TR_TE_CONTROL, INST_MODE, 4, 3)
     FIELD(TR_TE_CONTROL, CONTEXT, 9, 1)
+    FIELD(TR_TE_CONTROL, INST_TRIG_ENABLE, 11, 1)
+    FIELD(TR_TE_CONTROL, INST_STALL_OR_OVERFLOW, 12, 1)
     FIELD(TR_TE_CONTROL, INST_STALL_ENA, 13, 1)
     FIELD(TR_TE_CONTROL, INHIBIT_SRC, 15, 1)
     FIELD(TR_TE_CONTROL, INST_SYNC_MODE, 16, 2)
@@ -161,6 +163,8 @@ static uint64_t 
trencoder_te_ctrl_set_hardwire_vals(uint64_t input)
 {
     input = FIELD_DP32(input, TR_TE_CONTROL, INST_MODE, 0x6);
     input = FIELD_DP32(input, TR_TE_CONTROL, CONTEXT, 0);
+    input = FIELD_DP32(input, TR_TE_CONTROL, INST_TRIG_ENABLE, 0);
+    input = FIELD_DP32(input, TR_TE_CONTROL, INST_STALL_OR_OVERFLOW, 0);
     input = FIELD_DP32(input, TR_TE_CONTROL, INST_STALL_ENA, 0);
     input = FIELD_DP32(input, TR_TE_CONTROL, INHIBIT_SRC, 1);
 

-- 
2.43.0