On 2026/08/26 10:38 AM, Chinmay Rath wrote:
> From: Ojaswin Mujoo <[email protected]>
> 
> Convert b, ba, bl and bla to decode tree specification. The functionality
> was tested by comparing the qemu -D log -d op,in_asm output as well as
> single stepping gdb to confirm LR was correctly populated only when LK
> is set.
> 
> Signed-off-by: Ojaswin Mujoo <[email protected]>
> Reviewed-by: Nikhil Kumar Singh <[email protected]>
> Reviewed-by: Glenn Miles <[email protected]>
> Signed-off-by: Chinmay Rath <[email protected]>
> ---
>  target/ppc/insn32.decode               |  7 +++++++
>  target/ppc/internal.h                  |  7 -------
>  target/ppc/translate.c                 | 24 ------------------------
>  target/ppc/translate/branch-impl.c.inc | 24 ++++++++++++++++++++++++
>  4 files changed, 31 insertions(+), 31 deletions(-)

Reviewed-by: Amit Machhiwal <[email protected]>

> 
> diff --git a/target/ppc/insn32.decode b/target/ppc/insn32.decode
> index 91ece88a70..6a3254aaf6 100644
> --- a/target/ppc/insn32.decode
> +++ b/target/ppc/insn32.decode
> @@ -1488,6 +1488,13 @@ MCRF            010011 ... -- ... -- ----- 00000 00000 
> -       @XL_bfa
>  MFBHRBE         011111 ..... ..... ..... 0100101110 -   @XFX_bhrbe
>  CLRBHRB         011111 ----- ----- ----- 0110101110 -
>  
> +# Branch Instructions
> +%li             2:24 !function=times_4
> +&I_b            li aa:bool lk:bool
> +@I_b            ...... ........................ aa:1 lk:1 &I_b li=%li
> +
> +B               010010 ........................ . .  @I_b
> +
>  ## Misc POWER instructions
>  
>  ATTN            000000 00000 00000 00000 0100000000 0
> diff --git a/target/ppc/internal.h b/target/ppc/internal.h
> index a3bb12afd9..a20a0f9f7e 100644
> --- a/target/ppc/internal.h
> +++ b/target/ppc/internal.h
> @@ -197,13 +197,6 @@ EXTRACT_HELPER(L, 16, 2);
>  EXTRACT_HELPER(WC, 21, 2);
>  EXTRACT_HELPER(PL, 16, 2);
>  
> -/***                            Jump target decoding                       
> ***/
> -/* Immediate address */
> -static inline target_ulong LI(uint32_t opcode)
> -{
> -    return (opcode >> 0) & 0x03FFFFFC;
> -}
> -
>  static inline uint32_t BD(uint32_t opcode)
>  {
>      return (opcode >> 0) & 0xFFFC;
> diff --git a/target/ppc/translate.c b/target/ppc/translate.c
> index a31cda4490..b528cab17d 100644
> --- a/target/ppc/translate.c
> +++ b/target/ppc/translate.c
> @@ -3089,29 +3089,6 @@ static inline void gen_setlr(DisasContext *ctx, 
> target_ulong nip)
>      tcg_gen_movi_tl(cpu_lr, nip);
>  }
>  
> -/* b ba bl bla */
> -static void gen_b(DisasContext *ctx)
> -{
> -    target_ulong li, target;
> -
> -    /* sign extend LI */
> -    li = LI(ctx->opcode);
> -    li = (li ^ 0x02000000) - 0x02000000;
> -    if (likely(AA(ctx->opcode) == 0)) {
> -        target = ctx->cia + li;
> -    } else {
> -        target = li;
> -    }
> -    if (LK(ctx->opcode)) {
> -        gen_setlr(ctx, ctx->base.pc_next);
> -        gen_update_branch_history(ctx, ctx->cia, NULL, BHRB_TYPE_CALL);
> -    } else {
> -        gen_update_branch_history(ctx, ctx->cia, NULL, BHRB_TYPE_OTHER);
> -    }
> -    gen_goto_tb(ctx, 0, target);
> -    ctx->base.is_jmp = DISAS_NORETURN;
> -}
> -
>  #define BCOND_IM  0
>  #define BCOND_LR  1
>  #define BCOND_CTR 2
> @@ -5366,7 +5343,6 @@ GEN_HANDLER(stswx, 0x1F, 0x15, 0x14, 0x00000001, 
> PPC_STRING),
>  /* ISA v3.0 changed the extended opcode from 62 to 30 */
>  GEN_HANDLER(wait, 0x1F, 0x1E, 0x01, 0x039FF801, PPC_WAIT),
>  GEN_HANDLER_E(wait, 0x1F, 0x1E, 0x00, 0x039CF801, PPC_NONE, PPC2_ISA300),
> -GEN_HANDLER(b, 0x12, 0xFF, 0xFF, 0x00000000, PPC_FLOW),
>  GEN_HANDLER(bc, 0x10, 0xFF, 0xFF, 0x00000000, PPC_FLOW),
>  GEN_HANDLER(bcctr, 0x13, 0x10, 0x10, 0x00000000, PPC_FLOW),
>  GEN_HANDLER(bclr, 0x13, 0x10, 0x00, 0x00000000, PPC_FLOW),
> diff --git a/target/ppc/translate/branch-impl.c.inc 
> b/target/ppc/translate/branch-impl.c.inc
> index 9ade0c659a..745f71afd1 100644
> --- a/target/ppc/translate/branch-impl.c.inc
> +++ b/target/ppc/translate/branch-impl.c.inc
> @@ -31,3 +31,27 @@ static bool trans_RFEBB(DisasContext *ctx, arg_XL_s *arg)
>      return true;
>  }
>  #endif
> +
> +static bool trans_B(DisasContext *ctx, arg_I_b *a)
> +{
> +    target_ulong target, li;
> +
> +    /* sign extend LI */
> +    li = (a->li ^ 0x02000000) - 0x02000000;
> +
> +    if (likely(a->aa == 0)) {
> +        target = ctx->cia + li;
> +    } else {
> +        target = li;
> +    }
> +    if (a->lk) {
> +        gen_setlr(ctx, ctx->base.pc_next);
> +        gen_update_branch_history(ctx, ctx->cia, NULL, BHRB_TYPE_CALL);
> +    } else {
> +        gen_update_branch_history(ctx, ctx->cia, NULL, BHRB_TYPE_OTHER);
> +    }
> +    gen_goto_tb(ctx, 0, target);
> +    ctx->base.is_jmp = DISAS_NORETURN;
> +
> +    return true;
> +}
> -- 
> 2.55.0
> 

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