Hi Junjie, Following up on my earlier note -- I have done the rework and the end-to-end verification you flagged.
Reworked along the extra-pci-roots line: riscv virt now calls pci_bus_add_fw_cfg_extra_pci_roots() to advertise the pxb-cxl expander root bus, and EDK2's PciBusDxe enumerates behind it and assigns the root-port window and bus numbers. build_crs() then emits a correct _CRS for the ACPI0016 host bridge. The regenerated DSDT shows the firmware-assigned window (DWordMemory 0x40400000-0x405FFFFF, a QWordMemory, and WordBusNumber [0x0C-0x0D]), and as you noted it scales to multiple pxb-cxl (each gets its own window from the shared aperture). Verified end-to-end on a booting RVA22 guest: # cxl list -> mem0 (4 GiB), port1, root0 # cxl enable-memdev mem0 -> enabled 1 mem # cxl create-region -d decoder0.0 -w 1 mem0 -> region0 committed # daxctl online-memory dax0.0 -> onlined memory for 1 device # free -h -> 3.8Gi -> 7.8Gi (+4 GiB) I will send the respun series shortly. Thanks again, Pei
