Hi Cédric
> Subject: Re: [PATCH v3 8/9] hw/arm/aspeed_ast10x0: Wire SEC SRAM to the
> SBC model
>
> On 8/31/26 05:42, Jamin Lin wrote:
> > Pass the internal SEC SRAM region and its base address to the secure
> > boot controller (via the 'sram' link and 'sram-base' property)
>
> The commit log is outdated. The code now follows the container approach.
>
Thanks for the review and suggestion.
Will do
Jamin
>
> > so its
> > ECDSA engine can read the public key, signature and digest that the
> > guest firmware stages there before triggering a verify.
> >
> > Signed-off-by: Jamin Lin <[email protected]>
> > ---
> > hw/arm/aspeed_ast10x0.c | 7 ++++++-
> > 1 file changed, 6 insertions(+), 1 deletion(-)
> >
> > diff --git a/hw/arm/aspeed_ast10x0.c b/hw/arm/aspeed_ast10x0.c index
> > 5165dcce59..aeb5a4423d 100644
> > --- a/hw/arm/aspeed_ast10x0.c
> > +++ b/hw/arm/aspeed_ast10x0.c
> > @@ -250,8 +250,11 @@ static bool
> aspeed_soc_ast10x0_realize(Aspeed10x0SoCState *a, Error **errp)
> > error_propagate(errp, err);
> > return false;
> > }
> > + memory_region_init(&s->sram_container[1], OBJECT(s),
> "sec.sram-container",
> > + sc->sram_size[1]);
> > + memory_region_add_subregion(&s->sram_container[1], 0,
> > + &s->sram[1]);
> > memory_region_add_subregion(s->memory,
> sc->memmap[ASPEED_DEV_SRAM1],
> > - &s->sram[1]);
> > + &s->sram_container[1]);
> >
> > /* SCU */
> > if (!sysbus_realize(SYS_BUS_DEVICE(&s->scu), errp)) { @@ -350,6
> > +353,8 @@ static bool aspeed_soc_ast10x0_realize(Aspeed10x0SoCState *a,
> Error **errp)
> > }
> >
> > /* Secure Boot Controller */
> > + object_property_set_link(OBJECT(&s->sbc), "sram",
> OBJECT(&s->sram[1]),
> > + &error_abort);
> > if (!sysbus_realize(SYS_BUS_DEVICE(&s->sbc), errp)) {
> > return false;
> > }