Instantiate the E2000 DDR status device at 0x32b33000 and map it over the board-control placeholder. PBF and early U-Boot poll this selector window while firmware coordinates DRAM initialization from EL3.
Signed-off-by: Bin Meng <[email protected]> --- hw/arm/phytium_e2000.c | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/hw/arm/phytium_e2000.c b/hw/arm/phytium_e2000.c index c68a565330..f586184e51 100644 --- a/hw/arm/phytium_e2000.c +++ b/hw/arm/phytium_e2000.c @@ -25,6 +25,7 @@ #include "hw/core/qdev-properties.h" #include "hw/intc/arm_gicv3_common.h" #include "hw/intc/arm_gicv3_its_common.h" +#include "hw/misc/phytium_e2000_ddr.h" #include "hw/misc/unimp.h" #include "hw/net/cadence_gem.h" #include "hw/pci/pci.h" @@ -48,6 +49,8 @@ OBJECT_DECLARE_SIMPLE_TYPE(PhytiumE2000State, PHYTIUM_PI) #define PHYTIUM_E2000_NUM_UARTS 7 #define PHYTIUM_E2000_NUM_GEMS 4 +#define PHYTIUM_E2000_DDR_STATUS_BASE 0x32b33000 + #define PHYTIUM_E2000_GTIMER_HZ 50000000 enum { @@ -445,6 +448,21 @@ static void phytium_e2000_create_mci(PhytiumE2000State *s, int index) phytium_e2000_attach_sd_card(DW_MCI(mci), index); } +static void phytium_e2000_create_ddr_status(PhytiumE2000State *s) +{ + DeviceState *dev = qdev_new(TYPE_PHYTIUM_E2000_DDR); + SysBusDevice *sbd = SYS_BUS_DEVICE(dev); + + /* + * The selector window is embedded in the board-control aperture. It must + * override the placeholder because early U-Boot polls it while PBF is + * still coordinating DRAM initialization from EL3. + */ + object_property_add_child(OBJECT(s), "ddr-status", OBJECT(dev)); + sysbus_realize_and_unref(sbd, &error_fatal); + sysbus_mmio_map_overlap(sbd, 0, PHYTIUM_E2000_DDR_STATUS_BASE, 2); +} + static void phytium_e2000_create_unimplemented(void) { /* @@ -564,6 +582,8 @@ static void phytium_pi_init(MachineState *ms) phytium_e2000_create_cpus(s); phytium_e2000_create_gic(s); + phytium_e2000_create_ddr_status(s); + for (i = 0; i < PHYTIUM_E2000_NUM_MCIS; i++) { phytium_e2000_create_mci(s, i); } -- 2.53.0
