From: Joel Stanley <[email protected]> riscv_imsic_create() maps the device it creates into system_memory, which prevents its use by SoCs that map devices into their own memory container.
Add a MemoryRegion parameter and map the device into it instead of calling sysbus_mmio_map(). All callers pass system_memory, so there is no change in behaviour. Reviewed-by: Daniel Henrique Barboza <[email protected]> Reviewed-by: Philippe Mathieu-Daudé <[email protected]> Reviewed-by: Alistair Francis <[email protected]> Signed-off-by: Joel Stanley <[email protected]> Message-ID: <[email protected]> Signed-off-by: Alistair Francis <[email protected]> --- include/hw/intc/riscv_imsic.h | 3 ++- hw/intc/riscv_imsic.c | 6 ++++-- hw/riscv/aia.c | 6 ++++-- hw/riscv/xiangshan_kmh.c | 5 +++-- 4 files changed, 13 insertions(+), 7 deletions(-) diff --git a/include/hw/intc/riscv_imsic.h b/include/hw/intc/riscv_imsic.h index fae999731d..0a1df1c2f8 100644 --- a/include/hw/intc/riscv_imsic.h +++ b/include/hw/intc/riscv_imsic.h @@ -62,7 +62,8 @@ struct RISCVIMSICState { uint32_t num_irqs; }; -DeviceState *riscv_imsic_create(hwaddr addr, uint32_t hartid, bool mmode, +DeviceState *riscv_imsic_create(MemoryRegion *container, hwaddr addr, + uint32_t hartid, bool mmode, uint32_t num_pages, uint32_t num_ids); #endif diff --git a/hw/intc/riscv_imsic.c b/hw/intc/riscv_imsic.c index d6b46cdca2..cb9ce9612c 100644 --- a/hw/intc/riscv_imsic.c +++ b/hw/intc/riscv_imsic.c @@ -495,7 +495,8 @@ type_init(riscv_imsic_register_types) /* * Create IMSIC device. */ -DeviceState *riscv_imsic_create(hwaddr addr, uint32_t hartid, bool mmode, +DeviceState *riscv_imsic_create(MemoryRegion *container, hwaddr addr, + uint32_t hartid, bool mmode, uint32_t num_pages, uint32_t num_ids) { DeviceState *dev = qdev_new(TYPE_RISCV_IMSIC); @@ -518,7 +519,8 @@ DeviceState *riscv_imsic_create(hwaddr addr, uint32_t hartid, bool mmode, qdev_prop_set_uint32(dev, "num-irqs", num_ids + 1); sysbus_realize_and_unref(SYS_BUS_DEVICE(dev), &error_fatal); - sysbus_mmio_map(SYS_BUS_DEVICE(dev), 0, addr); + memory_region_add_subregion(container, addr, + sysbus_mmio_get_region(SYS_BUS_DEVICE(dev), 0)); if (!kvm_irqchip_in_kernel()) { for (i = 0; i < num_pages; i++) { diff --git a/hw/riscv/aia.c b/hw/riscv/aia.c index e11382e512..eae7638f97 100644 --- a/hw/riscv/aia.c +++ b/hw/riscv/aia.c @@ -53,7 +53,8 @@ DeviceState *riscv_create_aia(MemoryRegion *container, /* Per-socket M-level IMSICs */ addr = imsic_m->base + socket * (1U << IMSIC_MMIO_GROUP_MIN_SHIFT); for (i = 0; i < hart_count; i++) { - riscv_imsic_create(addr + i * m_imsic_stride, + riscv_imsic_create(container, + addr + i * m_imsic_stride, base_hartid + i, true, 1, num_msis); } @@ -62,7 +63,8 @@ DeviceState *riscv_create_aia(MemoryRegion *container, /* Per-socket S-level IMSICs */ addr = imsic_s->base + socket * (1U << IMSIC_MMIO_GROUP_MIN_SHIFT); for (i = 0; i < hart_count; i++) { - riscv_imsic_create(addr + i * s_imsic_stride, + riscv_imsic_create(container, + addr + i * s_imsic_stride, base_hartid + i, false, 1 + aia_guests, num_msis); } diff --git a/hw/riscv/xiangshan_kmh.c b/hw/riscv/xiangshan_kmh.c index 7ebe422dfc..bb9b1e05ef 100644 --- a/hw/riscv/xiangshan_kmh.c +++ b/hw/riscv/xiangshan_kmh.c @@ -64,14 +64,15 @@ static DeviceState *xiangshan_kmh_create_aia(uint32_t num_harts) /* M-level IMSICs */ addr = memmap[XIANGSHAN_KMH_IMSIC_M].base; for (i = 0; i < num_harts; i++) { - riscv_imsic_create(addr + i * IMSIC_HART_SIZE(0), i, true, + riscv_imsic_create(get_system_memory(), + addr + i * IMSIC_HART_SIZE(0), i, true, 1, XIANGSHAN_KMH_IMSIC_NUM_IDS); } /* S-level IMSICs */ addr = memmap[XIANGSHAN_KMH_IMSIC_S].base; for (i = 0; i < num_harts; i++) { - riscv_imsic_create(addr + + riscv_imsic_create(get_system_memory(), addr + i * IMSIC_HART_SIZE(XIANGSHAN_KMH_IMSIC_GUEST_BITS), i, false, 1 + XIANGSHAN_KMH_IMSIC_GUEST_BITS, XIANGSHAN_KMH_IMSIC_NUM_IDS); -- 2.55.0
