Hi Peter, Thanks, you are right. The v3 change incorrectly treated nPRIV as uniform across all M-profile CPUs.
For v4 I will add a dedicated ARM_FEATURE bit for the optional Unprivileged/Privileged Extension. Cortex-M0 will leave it clear, while the Cortex-M0+ configuration used by the RP2040 will enable it. Writes to nPRIV will then be permitted when either the Main Extension or this new feature is present. I will also adjust the tests so that the microbit Cortex-M0 case verifies that nPRIV remains clear, while the RP2040 Cortex-M0+ case verifies the privilege transitions. Thanks, Gilles
