On Mon, Sep 14, 2026 at 1:02 PM Marco Liebel <[email protected]> wrote:
> On Fri, Sep 11, 2026 at 5:08 PM Taylor Simpson <[email protected]> > wrote: > > > > Signed-off-by: Taylor Simpson <[email protected]> > > --- > > tests/tcg/hexagon/multiple-writes.c | 46 +++++++++++++++++++++++++++++ > > tests/tcg/hexagon/meson.build | 2 +- > > 2 files changed, 47 insertions(+), 1 deletion(-) > > > > diff --git a/tests/tcg/hexagon/multiple-writes.c > b/tests/tcg/hexagon/multiple-writes.c > > index 4305903547 <(430)%20590-3547>..b93f2ab32e 100644 > > --- a/tests/tcg/hexagon/multiple-writes.c > > +++ b/tests/tcg/hexagon/multiple-writes.c > > @@ -199,6 +199,49 @@ static int test_post_increment3(void) > > return sig; > > } > > > > +static int test_vreg_legal_predicated(void) > > +{ > > + int sig; > > + > > + asm volatile( > > + "r0 = #0\n" > > + "r1 = ##1f\n" > > + "memw(%1) = r1\n" > > + "r2 = #7\n" > > + "r3 = #13\n" > > + "p0 = cmp.eq(r2, r3)\n" > > + "{\n" > > + " if (p0) v0 = v1\n" > > + " if (!p0) v0 = v2\n" > > + "}\n" > > + "1:\n" > > + "%0 = #23\n" > > + : "=r"(sig) > > + : "r"(&resume_pc) > > + : "r0", "r1", "r2", "r3", "p0", "v0", "v1", "memory"); > > + > > + return sig; > > +} > > + > > +static int test_vreg_illegal(void) > > +{ > > + int sig; > > + > > + asm volatile( > > + "r0 = #0\n" > > + "r1 = ##1f\n" > > + "memw(%1) = r1\n" > > + ".word 0x1e0361e0 /* { v0 = v1 */\n" > > + ".word 0x1e03e2e0 /* v0 = v2 } */\n" > > + "1:\n" > > + "%0 = r0\n" > > + : "=r"(sig) > > + : "r"(&resume_pc) > > + : "r0", "r1", "memory"); > > + > > + return sig; > > +} > > + > > Would it be useful to add a mixed predicated/unconditional test as well? > > Such as: > if (p0) v0 = v1 > v0 = v2 > Yes, will do. Taylor
