From: Nicholas Piggin <[email protected]> Ascalon supports Zkr and the SEED CSR.
Reviewed-by: Chao Liu <[email protected]> Reviewed-by: Alistair Francis <[email protected]> Signed-off-by: Nicholas Piggin <[email protected]> Signed-off-by: Joel Stanley <[email protected]> Message-ID: <[email protected]> Signed-off-by: Alistair Francis <[email protected]> (cherry picked from commit 569aa6280d141129c705c361350705832b33cf88) (Mjt: back-port to 10.0.x across v10.0.0-1083-g09ef7d97454a "target/riscv: convert TT Ascalon to RISCVCPUDef") Signed-off-by: Michael Tokarev <[email protected]> diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c index bf4855ec02d..5e37cc3645d 100644 --- a/target/riscv/cpu.c +++ b/target/riscv/cpu.c @@ -646,6 +646,7 @@ static void rv64_tt_ascalon_cpu_init(Object *obj) cpu->cfg.ext_zba = true; cpu->cfg.ext_zbb = true; cpu->cfg.ext_zbs = true; + cpu->cfg.ext_zkr = true; cpu->cfg.ext_zkt = true; cpu->cfg.ext_zvbb = true; cpu->cfg.ext_zvbc = true; -- 2.47.3
