Translate through gen_helper_raise_excp with restore 0 after syncing PC. Drop TCG raise_exception. Exit HW_EXCP and MMU through cpu_loop_exit_excp.
Signed-off-by: Yonggang Luo <[email protected]> --- target/microblaze/helper.c | 3 +-- target/microblaze/helper.h | 2 -- target/microblaze/op_helper.c | 22 ++++------------------ target/microblaze/translate.c | 3 ++- 4 files changed, 7 insertions(+), 23 deletions(-) diff --git a/target/microblaze/helper.c b/target/microblaze/helper.c index 05a90f5ecb2..d092e916db4 100644 --- a/target/microblaze/helper.c +++ b/target/microblaze/helper.c @@ -146,8 +146,7 @@ bool mb_cpu_tlb_fill(CPUState *cs, vaddr address, int size, } /* TLB miss. */ - cs->exception_index = EXCP_MMU; - cpu_loop_exit_restore(cs, retaddr); + cpu_loop_exit_excp(cs, EXCP_MMU, retaddr); } void mb_cpu_do_interrupt(CPUState *cs) diff --git a/target/microblaze/helper.h b/target/microblaze/helper.h index 1429c1727ef..ad9c22ed5b7 100644 --- a/target/microblaze/helper.h +++ b/target/microblaze/helper.h @@ -1,5 +1,3 @@ -DEF_HELPER_FLAGS_2(raise_exception, TCG_CALL_NO_WG, noreturn, env, i32) - DEF_HELPER_FLAGS_3(divs, TCG_CALL_NO_WG, i32, env, i32, i32) DEF_HELPER_FLAGS_3(divu, TCG_CALL_NO_WG, i32, env, i32, i32) diff --git a/target/microblaze/op_helper.c b/target/microblaze/op_helper.c index 3da0c68da39..f3dc42d5bdd 100644 --- a/target/microblaze/op_helper.c +++ b/target/microblaze/op_helper.c @@ -62,25 +62,14 @@ uint32_t helper_get(uint32_t id, uint32_t ctrl) return 0xdead0000 | id; } -void helper_raise_exception(CPUMBState *env, uint32_t index) -{ - CPUState *cs = env_cpu(env); - - cs->exception_index = index; - cpu_loop_exit(cs); -} - /* Raises ESR_EC_DIVZERO if exceptions are enabled. */ static void raise_divzero(CPUMBState *env, uint32_t esr, uintptr_t unwind_pc) { env->msr |= MSR_DZ; if ((env->msr & MSR_EE) && env_archcpu(env)->cfg.div_zero_exception) { - CPUState *cs = env_cpu(env); - env->esr = esr; - cs->exception_index = EXCP_HW_EXCP; - cpu_loop_exit_restore(cs, unwind_pc); + cpu_loop_exit_excp(env_cpu(env), EXCP_HW_EXCP, unwind_pc); } } @@ -123,8 +112,7 @@ static void raise_fpu_exception(CPUMBState *env, uintptr_t ra) CPUState *cs = env_cpu(env); env->esr = ESR_EC_FPU; - cs->exception_index = EXCP_HW_EXCP; - cpu_loop_exit_restore(cs, ra); + cpu_loop_exit_excp(cs, EXCP_HW_EXCP, ra); } static void update_fpu_flags(CPUMBState *env, int flags, uintptr_t ra) @@ -390,8 +378,7 @@ void helper_stackprot(CPUMBState *env, uint32_t addr) env->ear = addr; env->esr = ESR_EC_STACKPROT; - cs->exception_index = EXCP_HW_EXCP; - cpu_loop_exit_restore(cs, GETPC()); + cpu_loop_exit_excp(cs, EXCP_HW_EXCP, GETPC()); } } @@ -444,8 +431,7 @@ static void mb_transaction_failed_internal(CPUState *cs, hwaddr physaddr, if (take) { env->esr = esr; env->ear = addr; - cs->exception_index = EXCP_HW_EXCP; - cpu_loop_exit_restore(cs, retaddr); + cpu_loop_exit_excp(cs, EXCP_HW_EXCP, retaddr); } } diff --git a/target/microblaze/translate.c b/target/microblaze/translate.c index 8b219afb5dd..8893fa0d4fe 100644 --- a/target/microblaze/translate.c +++ b/target/microblaze/translate.c @@ -100,7 +100,8 @@ static void t_sync_flags(DisasContext *dc) static void gen_raise_exception(DisasContext *dc, uint32_t index) { - gen_helper_raise_exception(tcg_env, tcg_constant_i32(index)); + gen_helper_raise_excp(tcg_env, tcg_constant_i32(index), + tcg_constant_i32(0)); dc->base.is_jmp = DISAS_NORETURN; } -- 2.52.0.windows.1
