From: Corvin Köhne <[email protected]> Hi,
Beckhoff has build a board, called CX7200, based on the Xilinx Zynq A9 platform. This commit series adds the Beckhoff CX7200 as new board variant to QEMU. The emulation is able to successfully boot an CX7200 image. The image includes some self tests executed on every boot. Only the cache self test fails due to QEMU emulating the cache as always being coherent. The self tests include f.e.: * Network * Flash * CCAT DMA + EEPROM [1] * TwinCAT (Beckhoff's automation control software [2]) [1] https://github.com/beckhoff/ccat [2] https://www.beckhoff.com/en-us/products/automation/ YannickV (7): hw/misc: Add Beckhoff CCAT device hw/arm/xilinx_zynq: Add flash type as machine class property hw/misc/zynq_slcr: Add CPU clock outputs and ratios hw/timer,cpu: Add Clock API support to A9MPCore timers hw/arm/xilinx_zynq: Make PS frequency configurable hw/arm: Add new machine based on xilinx-zynq-a9 for Beckhoff CX7200 docs/system/arm: Add support for Beckhoff CX7200 MAINTAINERS | 9 + docs/system/arm/beckhoff-cx7200.rst | 68 ++++++ docs/system/target-arm.rst | 1 + hw/arm/Kconfig | 7 + hw/arm/beckhoff_CX7200.c | 79 +++++++ hw/arm/meson.build | 1 + hw/arm/xilinx_zynq.c | 23 +- hw/cpu/a9mpcore.c | 12 + hw/misc/Kconfig | 2 + hw/misc/beckhoff_ccat.c | 347 ++++++++++++++++++++++++++++ hw/misc/meson.build | 1 + hw/misc/zynq_slcr.c | 37 +++ hw/timer/a9gtimer.c | 42 +++- hw/timer/arm_mptimer.c | 19 +- include/hw/arm/xilinx_zynq.h | 9 +- include/hw/cpu/a9mpcore.h | 1 + include/hw/timer/a9gtimer.h | 1 + include/hw/timer/arm_mptimer.h | 2 + 18 files changed, 643 insertions(+), 18 deletions(-) create mode 100644 docs/system/arm/beckhoff-cx7200.rst create mode 100644 hw/arm/beckhoff_CX7200.c create mode 100644 hw/misc/beckhoff_ccat.c -- 2.47.3
