Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>
---
target/arm/cpu.h | 1 +
target/arm/tcg/translate.h | 2 ++
target/arm/tcg/hflags.c | 3 +++
target/arm/tcg/translate-a64.c | 1 +
target/arm/tcg/translate.c | 1 +
5 files changed, 8 insertions(+)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 735e777d103..4e8a472ee71 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -2483,6 +2483,7 @@ FIELD(TBFLAG_ANY, ALIGN_MEM, 10, 1)
FIELD(TBFLAG_ANY, PSTATE__IL, 11, 1)
FIELD(TBFLAG_ANY, FGT_ACTIVE, 12, 1)
FIELD(TBFLAG_ANY, FGT_SVC, 13, 1)
+FIELD(TBFLAG_ANY, PSTATE__UINJ, 14, 1)
/*
* Bit usage when in AArch32 state, both A- and M-profile.
diff --git a/target/arm/tcg/translate.h b/target/arm/tcg/translate.h
index 31f52a34a68..f633aa265f0 100644
--- a/target/arm/tcg/translate.h
+++ b/target/arm/tcg/translate.h
@@ -155,6 +155,8 @@ typedef struct DisasContext {
bool align_mem;
/* True if PSTATE.IL is set */
bool pstate_il;
+ /* True if PSTATE.UINJ is set */
+ bool pstate_uinj;
/* True if PSTATE.SM is set. */
bool pstate_sm;
/* True if PSTATE.ZA is set. */
diff --git a/target/arm/tcg/hflags.c b/target/arm/tcg/hflags.c
index cf7d49be908..c0b47f484e6 100644
--- a/target/arm/tcg/hflags.c
+++ b/target/arm/tcg/hflags.c
@@ -121,6 +121,9 @@ static void rebuild_hflags_common_aprofile(CPUARMTBFlags
*flags,
if (il) {
DP_TBFLAG_ANY(*flags, PSTATE__IL, 1);
}
+ if (env->pstate & PSTATE_UINJ) {
+ DP_TBFLAG_ANY(*flags, PSTATE__UINJ, 1);
+ }
if (aprofile_require_alignment(env, el, sctlr)) {
DP_TBFLAG_ANY(*flags, ALIGN_MEM, 1);
}
diff --git a/target/arm/tcg/translate-a64.c b/target/arm/tcg/translate-a64.c
index c60f4c4103d..b3438235828 100644
--- a/target/arm/tcg/translate-a64.c
+++ b/target/arm/tcg/translate-a64.c
@@ -11028,6 +11028,7 @@ static void
aarch64_tr_init_disas_context(DisasContextBase *dcbase,
dc->fp_excp_el = EX_TBFLAG_ANY(tb_flags, FPEXC_EL);
dc->align_mem = EX_TBFLAG_ANY(tb_flags, ALIGN_MEM);
dc->pstate_il = EX_TBFLAG_ANY(tb_flags, PSTATE__IL);
+ dc->pstate_uinj = EX_TBFLAG_ANY(tb_flags, PSTATE__UINJ);
dc->fgt_active = EX_TBFLAG_ANY(tb_flags, FGT_ACTIVE);
dc->fgt_svc = EX_TBFLAG_ANY(tb_flags, FGT_SVC);
dc->trap_eret = EX_TBFLAG_A64(tb_flags, TRAP_ERET);
diff --git a/target/arm/tcg/translate.c b/target/arm/tcg/translate.c
index 8c56348a665..f32200cc47e 100644
--- a/target/arm/tcg/translate.c
+++ b/target/arm/tcg/translate.c
@@ -6418,6 +6418,7 @@ static void arm_tr_init_disas_context(DisasContextBase
*dcbase, CPUState *cs)
dc->fp_excp_el = EX_TBFLAG_ANY(tb_flags, FPEXC_EL);
dc->align_mem = EX_TBFLAG_ANY(tb_flags, ALIGN_MEM);
dc->pstate_il = EX_TBFLAG_ANY(tb_flags, PSTATE__IL);
+ dc->pstate_uinj = EX_TBFLAG_ANY(tb_flags, PSTATE__UINJ);
dc->fgt_active = EX_TBFLAG_ANY(tb_flags, FGT_ACTIVE);
dc->fgt_svc = EX_TBFLAG_ANY(tb_flags, FGT_SVC);
--
2.53.0
