Reviewed-by: Peter Maydell <[email protected]>
Signed-off-by: Richard Henderson <[email protected]>
---
target/arm/cpu-features.h | 6 ++++++
1 file changed, 6 insertions(+)
diff --git a/target/arm/cpu-features.h b/target/arm/cpu-features.h
index 06318d12f9f..a9eebb45564 100644
--- a/target/arm/cpu-features.h
+++ b/target/arm/cpu-features.h
@@ -290,6 +290,7 @@ FIELD(ID_AA64PFR2, MTEPERM, 0, 4)
FIELD(ID_AA64PFR2, MTESTOREONLY, 4, 4)
FIELD(ID_AA64PFR2, MTEFAR, 8, 4)
FIELD(ID_AA64PFR2, GCIE, 12, 4)
+FIELD(ID_AA64PFR2, UINJ, 16, 4)
FIELD(ID_AA64PFR2, FPMR, 32, 4)
FIELD(ID_AA64MMFR0, PARANGE, 0, 4)
@@ -1242,6 +1243,11 @@ static inline bool isar_feature_aa64_gcie(const
ARMISARegisters *id)
return FIELD_EX64_IDREG(id, ID_AA64PFR2, GCIE) != 0;
}
+static inline bool isar_feature_aa64_uinj(const ARMISARegisters *id)
+{
+ return FIELD_EX64_IDREG(id, ID_AA64PFR2, UINJ) != 0;
+}
+
static inline bool isar_feature_aa64_fpmr(const ARMISARegisters *id)
{
return FIELD_EX64_IDREG(id, ID_AA64PFR2, FPMR) != 0;
--
2.53.0
