Hi Khushit, On 9/24/26 8:26 AM, Khushit Shah wrote: > >> On 16 Sep 2026, at 8:15 PM, Eric Auger <[email protected]> wrote: >> >> + >> +/* >> + * decode_idreg_writemap: Generate props for writable fields >> + * >> + * @obj: CPU object >> + * @reg: description of the sysreg >> + */ >> +static int >> +decode_idreg_writemap(Object *obj, ARM64SysReg *reg) >> +{ >> + uint64_t map = reg->writable_mask; >> + int i = ctz64(map); >> + int nb_sysreg_props = 0; >> + >> + while (map) { >> + ARM64SysRegField *field = get_field(i, reg); >> + int lower, upper; >> + char *prop_name; >> + uint64_t field_mask; >> + >> + if (!field) { >> + warn_report("%s bit %d of %s is writable but no named field " >> + "in target/arm/cpu-idregs.h.inc", >> + __func__, i, reg->name); >> + map = map & ~BIT_ULL(i); >> + i = ctz64(map); >> + continue; >> + } >> + lower = field->shift; >> + upper = field->shift + field->length - 1; >> + prop_name = g_strdup_printf("SYSREG_%s_%s", reg->name, field->name); >> + trace_decode_idreg_writemap(field->name, lower, upper, prop_name); >> + object_property_add(obj, prop_name, "uint64", >> + get_sysreg_prop, set_sysreg_prop, NULL, field); >> + g_free(prop_name); >> + nb_sysreg_props++; >> + >> + field_mask = MAKE_64BIT_MASK(lower, field->length); >> + map = map & ~field_mask; >> + i = ctz64(map); >> + } >> + trace_nb_sysreg_props(reg->name, nb_sysreg_props); >> + return 0; >> +} >> + > We can try field based handling, it is more elegant. > - for each field, check if not RES and writable. As discussed I now enumerate all the fields instead of decoding the writbale bitmask. But I still do some sanity checks on the consumed writable bitmask: - check the field is fully writable - check if, after enumerating all fields I still have some writable bits. The above cases would highlight some inconsistencies between KVM outputs and qemu architecture description. I think it is worth.
Thanks Eric > > <Though I will argue that all fields should be present not just writable :)> > > >
