On 9/24/26 12:24 PM, Khushit Shah wrote: > >> On 16 Sep 2026, at 8:15 PM, Eric Auger <[email protected]> wrote: >> >> !-------------------------------------------------------------------| >> CAUTION: External Email >> >> |-------------------------------------------------------------------! >> >> Introduce a script that takes as input the Registers.json file >> delivered in the AARCHMRS Features Model downloadable from the >> Arm Developer A-Profile Architecture Exploration Tools page: >> https://urldefense.proofpoint.com/v2/url?u=https-3A__developer.arm.com_Architectures_A-2DProfile-2520Architecture-23Downloads&d=DwIDAg&c=s883GpUCOChKOHiocYtGcg&r=PGWMyignA0NiDmTlyP7vOTHozBws_VN86yrVmSMkBp0&m=SAaDSqqwmIC1nbrh-28kms6KiFYKvW8H_CIOKWgWjucuAn37j49gnNNnMIpoP_bK&s=sxOID-2FnhcQ56l1mmjKbXtXpcERk4oOXYiF3-6fenk&e= >> >> and outputs the list of ID regs in target/arm/cpu-sysregs.h.inc >> under the form of DEF(<name>, <op0>, <op1>, <crn>, <crm>, <op2>). >> >> We only care about IDregs with opcodes satisfying: >> op0 = 3, op1 = {0,1,3}, crn = 0, crm within [0, 7], op2 within [0, 7] >> >> Signed-off-by: Eric Auger <[email protected]> >> [CH: note correct op1 range, don't skip CCSIDR] >> Signed-off-by: Cornelia Huck <[email protected]> >> Message-ID: <[email protected]> >> --- >> scripts/update-aarch64-cpu-sysregs-header.py | 146 +++++++++++++++++++ >> 1 file changed, 146 insertions(+) >> create mode 100755 scripts/update-aarch64-cpu-sysregs-header.py >> >> diff --git a/scripts/update-aarch64-cpu-sysregs-header.py >> b/scripts/update-aarch64-cpu-sysregs-header.py >> new file mode 100755 >> index 0000000000..ef1471a197 >> --- /dev/null >> +++ b/scripts/update-aarch64-cpu-sysregs-header.py >> @@ -0,0 +1,146 @@ >> +#!/usr/bin/env python3 >> + >> +# This script takes as input the Registers.json file delivered in >> +# the AARCHMRS Features Model downloadable from the Arm Developer >> +# A-Profile Architecture Exploration Tools page: >> +# >> https://urldefense.proofpoint.com/v2/url?u=https-3A__developer.arm.com_Architectures_A-2DProfile-2520Architecture-23Downloads&d=DwIDAg&c=s883GpUCOChKOHiocYtGcg&r=PGWMyignA0NiDmTlyP7vOTHozBws_VN86yrVmSMkBp0&m=SAaDSqqwmIC1nbrh-28kms6KiFYKvW8H_CIOKWgWjucuAn37j49gnNNnMIpoP_bK&s=sxOID-2FnhcQ56l1mmjKbXtXpcERk4oOXYiF3-6fenk&e= >> >> +# and outputs the list of ID regs in target/arm/cpu-sysregs.h.inc >> +# under the form of DEF(<name>, <op0>, <op1>, <crn>, <crm>, <op2>) >> +# >> +# Copyright (C) 2026 Red Hat, Inc. >> +# >> +# Authors: Eric Auger <[email protected]> >> +# >> +# SPDX-License-Identifier: GPL-2.0-or-later >> + >> + >> +import json >> +import os >> +import sys >> + >> +def is_demux_register(r): >> + name = r.get('name', '') >> + >> + if name.startswith("CCSIDR"): >> + return True >> + >> + return False >> + >> +# Some regs have op code values like 000x, 001x. Anyway we don't need >> +# them. Besides some regs are undesired in the generated file such as >> +# VMPIDR_EL2 and VPIDR_EL2 which are outside of the IDreg scope we >> +# are interested in and are tricky to decode as their system accessor >> +# refer to MPIDR_EL1/MIDR_EL1 respectively >> + >> +skiplist = ['ALLINT', 'PM', 'S1_', 'S3_', 'SVCR', \ >> + 'VMPIDR_EL2', 'VPIDR_EL2’] > I see VMPIDR_EL2/VPIDR_EL2 have op1=0100, they will automatically get > skipped, why is this needed? because op1=4 is outside of the IDreg range: op0 = 3, op1 = {0,1,3}, crn = 0, crm within [0, 7], op2 within [0, 7] Eric > > Warm Regards, > Khushit >> +# returns the int value of a given @opcode for a reg @encoding >> +def get_opcode(encoding, opcode): >> + fvalue = encoding.get(opcode) >> + if fvalue: >> + value = fvalue.get('value') >> + if isinstance(value, str): >> + value = value.strip("'") >> + value = int(value, 2) >> + return value >> + return -1 >> + >> +def extract_idregs_from_registers_json(filename): >> + """ >> + Load a Registers.json file and extract all ID registers, decode their >> + opcode and dump the information in target/arm/cpu-sysregs.h.inc >> + >> + Args: >> + filename (str): The path to the Registers.json >> + returns: >> + idregs: list of ID regs and their encoding >> + """ >> + if not os.path.exists(filename): >> + print(f"Error: {filename} could not be found!") >> + return {} >> + >> + try: >> + with open(filename, 'r') as f: >> + register_data = json.load(f) >> + >> + except json.JSONDecodeError: >> + print(f"Could not decode json from '{filename}'!") >> + return {} >> + except Exception as e: >> + print(f"Unexpected error while reading {filename}: {e}") >> + return {} >> + >> + registers = [ >> + r for r in register_data >> + if isinstance(r, dict) >> + and r.get('_type') == 'Register' >> + and not is_demux_register(r) >> + ] >> + >> + idregs = {} >> + >> + for register in registers: >> + reg_name = register.get('name') >> + >> + is_skipped = any(term in (reg_name or "").upper() for term in >> skiplist) >> + >> + if reg_name and not is_skipped: >> + accessors = register.get('accessors', []) >> + >> + for accessor in accessors: >> + type = accessor.get('_type') >> + if type in ['Accessors.SystemAccessor']: >> + encoding_list = accessor.get('encoding') >> + >> + if isinstance(encoding_list, list) and encoding_list >> and \ >> + isinstance(encoding_list[0], dict): >> + encoding_wrapper = encoding_list[0] >> + encoding_source = encoding_wrapper.get('encodings', >> \ >> + >> encoding_wrapper) >> + >> + if isinstance(encoding_source, dict): >> + op0 = get_opcode(encoding_source, 'op0') >> + op1 = get_opcode(encoding_source, 'op1') >> + op2 = get_opcode(encoding_source, 'op2') >> + crn = get_opcode(encoding_source, 'CRn') >> + crm = get_opcode(encoding_source, 'CRm') >> + encoding_str=f"{op0} {op1} {crn} {crm} >> {op2}" >> + >> + # ID regs are assumed within this scope >> + if op0 == 3 and (op1 == 0 or op1 == 1 or op1 == 3) and \ >> + crn == 0 and (crm >= 0 and crm <= 7) and (op2 >= 0 and >> op2 <= 7): >> + idregs[reg_name] = encoding_str >> + >> + return idregs >> + >> +if __name__ == "__main__": >> + # Single arg expected: the path to the Registers.json file >> + if len(sys.argv) < 2: >> + print("Usage: python scripts/update-aarch64-cpu-sysregs-header.py " >> + "<path_to_registers_json>") >> + sys.exit(1) >> + else: >> + json_file_path = sys.argv[1] >> + >> + extracted_registers = extract_idregs_from_registers_json(json_file_path) >> + >> + if extracted_registers: >> + output_list = extracted_registers.items() >> + >> + # Sort by register name >> + sorted_output = sorted(output_list, key=lambda item: item[0]) >> + >> + # format lines as DEF(<name>, <op0>, <op1>, <crn>, <crm>, <op2>) >> + final_output = "" >> + for reg_name, encoding in sorted_output: >> + reformatted_encoding = encoding.replace(" ", ", ") >> + final_output += f"DEF({reg_name}, {reformatted_encoding})\n" >> + >> + with open("target/arm/cpu-sysregs.h.inc", 'w') as f: >> + f.write("/* SPDX-License-Identifier: GPL-2.0-or-later */\n\n") >> + f.write("/* This file is autogenerated by ") >> + f.write("scripts/update-aarch64-cpu-sysregs-header.py */\n") >> + f.write("/* DEF(<name>, <op0>, <op1>, <crn>, <crm>, <op2>) >> */\n\n") >> + f.write(final_output) >> + print("updated target/arm/cpu-sysregs.h.inc") >> -- >> 2.53.0 >>
